Etienne Carriere 33dd33f8f0 qemu: fix holding pen mailbox sequence ... Before this change, plat_secondary_cold_boot_setup reads wake up mailbox as a byte array but through 64bit accesses on unaligned 64bit addresses. In the other hand qemu_pwr_domain_on wakes secondary cores by writing into a 64bit array. This change forces the 64bit mailbox format as PLAT_QEMU_HOLD_ENTRY_SIZE explicitly specifies it. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>		2017-10-24 13:57:36 +02:00
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plat_helpers.S	qemu: fix holding pen mailbox sequence	2017-10-24 13:57:36 +02:00