Dimitris Papastamos 040b546e94 Implement Cortex-Ares 1043202 erratum workaround ... The workaround uses the instruction patching feature of the Ares cpu. Change-Id: I868fce0dc0e8e41853dcce311f01ee3867aabb59 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>		2018-06-08 11:46:31 +01:00
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aem_generic.h	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
cortex_a35.h	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
cortex_a53.h	CPU: Correct names of implementation-defined aux regs	2017-08-29 13:52:48 +01:00
cortex_a55.h	Add support for Cortex-A75 and Cortex-A55 CPUs	2017-06-01 11:44:52 +01:00
cortex_a57.h	Implement static workaround for CVE-2018-3639	2018-05-23 12:45:48 +01:00
cortex_a72.h	Implement static workaround for CVE-2018-3639	2018-05-23 12:45:48 +01:00
cortex_a73.h	Implement static workaround for CVE-2018-3639	2018-05-23 12:45:48 +01:00
cortex_a75.h	Implement static workaround for CVE-2018-3639	2018-05-23 12:45:48 +01:00
cortex_a76.h	Add support for Cortex-Ares and Cortex-A76 CPUs	2018-06-08 11:46:31 +01:00
cortex_ares.h	Implement Cortex-Ares 1043202 erratum workaround	2018-06-08 11:46:31 +01:00
cpu_macros.S	Add support for dynamic mitigation for CVE-2018-3639	2018-05-23 12:45:48 +01:00
cpuamu.h	Refactor AMU support for Cortex A75	2018-02-27 13:28:41 +00:00
denver.h	include: add U()/ULL() macros for constants	2017-06-14 17:00:30 -07:00