38 lines
1.0 KiB
C
38 lines
1.0 KiB
C
/*
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* Copyright (c) 2019-2020, ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef MHU_H
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#define MHU_H
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#define MHU_POLL_INTR_STAT_TIMEOUT 50000 /*timeout value in us*/
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/* CPU MHU secure channel registers */
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#define CPU_INTR_S_STAT 0x00
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#define CPU_INTR_S_SET 0x0C
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/* MHUv2 Control Registers Offsets */
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#define MHU_V2_MSG_CFG_OFFSET 0xF80
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#define MHU_V2_ACCESS_REQ_OFFSET 0xF88
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#define MHU_V2_ACCESS_READY_OFFSET 0xF8C
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#define MHU_V2_ACCESS_REQUEST(addr) \
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mmio_write_32((addr) + MHU_V2_ACCESS_REQ_OFFSET, 0x1)
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#define MHU_V2_CLEAR_REQUEST(addr) \
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mmio_write_32((addr) + MHU_V2_ACCESS_REQ_OFFSET, 0x0)
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#define MHU_V2_IS_ACCESS_READY(addr) \
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(mmio_read_32((addr) + MHU_V2_ACCESS_READY_OFFSET) & 0x1)
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void mhu_secure_message_start(uintptr_t address, unsigned int slot_id);
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void mhu_secure_message_send(uintptr_t address,
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unsigned int slot_id,
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unsigned int message);
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void mhu_secure_message_end(uintptr_t address, unsigned int slot_id);
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void mhu_secure_init(void);
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#endif /* MHU_H */
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