Soby Mathew f4d58669d0 Non-Secure Interrupt support during Standard SMC processing in TSP ... Implements support for Non Secure Interrupts preempting the Standard SMC call in EL1. Whenever an IRQ is trapped in the Secure world we securely handover to the Normal world to process the interrupt. The normal world then issues "resume" smc call to resume the previous interrupted SMC call. Fixes ARM-software/tf-issues#105 Change-Id: I72b760617dee27438754cdfc9fe9bcf4cc024858		2014-05-19 14:25:17 +01:00
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aarch64	Introduce interrupt handling framework in BL3-1	2014-05-19 13:10:49 +01:00
bl31.ld.S	Use --gc-sections during link	2014-03-26 21:54:37 +00:00
bl31.mk	Introduce interrupt handling framework in BL3-1	2014-05-19 13:10:49 +01:00
bl31_main.c	Rework BL3-1 unhandled exception handling and reporting	2014-05-16 14:51:00 +01:00
context_mgmt.c	Introduce interrupt registration framework in BL3-1	2014-05-19 13:10:49 +01:00
interrupt_mgmt.c	Introduce interrupt registration framework in BL3-1	2014-05-19 13:10:49 +01:00
runtime_svc.c	Non-Secure Interrupt support during Standard SMC processing in TSP	2014-05-19 14:25:17 +01:00