This adds BL31 support to Intel Stratix10 SoCFPGA platform. BL31 in TF-A supports: - PSCI calls to enable 4 CPU cores - PSCI mailbox calls for FPGA reconfiguration Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com> |
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.. | ||
plat_macros.S | ||
platform_private.h | ||
s10_clock_manager.h | ||
s10_handoff.h | ||
s10_mailbox.h | ||
s10_memory_controller.h | ||
s10_noc.h | ||
s10_pinmux.h | ||
s10_reset_manager.h | ||
s10_system_manager.h |