Jayanth Dodderi Chidanand f74cb0be8a fix(amu): fault handling on EL2 context switch ... The HAFGRTR_EL2 register is UNDEFINED unless the CPU supports both FEAT_FGT and FEAT_AMUv1. FEAT_FGT is mandatory for v8.6-A and upwards, but FEAT_AMUv1 is optional (from v8.4-A upwards), and as such any 8.6-A cores today without support for FEAT_AMUv1 will trigger an undefined instruction exception on accessing this register. Currently ARM_ARCH_AT_LEAST macro has been used to associate with an architecture extension allowing to access HAFGRTR_EL2 register. This condition should be replaced with macros specific to individual features. This patch adds a new set of macros "ENABLE_FEAT_FGT, ENABLE_FEAT_AMUv1, ENABLE_FEAT_ECV" under build options to provide controlled access to the HAFGRTR_EL2 register. Further to ensure that the the build options passed comply with the given hardware implementation, a feature detection mechanism, checking whether build options match with the architecture is required at bootime. This will be implemented and pushed later in a separate patch. Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: Ie390f4babe233b8b09455290277edbddecd33ead		2021-12-10 12:33:51 +00:00
..
aarch32	feat(trf): enable trace filter control register access from lower NS EL	2021-08-26 09:32:35 +01:00
aarch64	fix(amu): fault handling on EL2 context switch	2021-12-10 12:33:51 +00:00
cpu_data_array.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00