Joel Hutton dd4cf2c745 Cortex A9:errata 794073 workaround ... On Cortex A9 an errata can cause the processor to violate the rules for speculative fetches when the MMU is off but branch prediction has not been disabled. The workaround for this is to execute an Invalidate Entire Branch Prediction Array (BPIALL) followed by a DSB. see:http://arminfo.emea.arm.com/help/topic/com.arm.doc.uan0009d/UAN0009_cortex_a9_errata_r4.pdf for more details. Change-Id: I9146c1fa7563a79f4e15b6251617b9620a587c93 Signed-off-by: Joel Hutton <Joel.Hutton@arm.com>		2019-04-12 10:10:32 +00:00
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aarch32	Cortex A9:errata 794073 workaround	2019-04-12 10:10:32 +00:00
aarch64	Add support for Cortex-A76AE CPU	2019-04-08 14:48:55 +01:00
cpu-ops.mk	Cortex A9:errata 794073 workaround	2019-04-12 10:10:32 +00:00
errata_report.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00