Varun Wadekar e0d913c786 Add macros for retention control in Cortex-A53/A57 ... This patch adds macros suitable for programming the Advanced SIMD/Floating-point (only Cortex-A53), CPU and L2 dynamic retention control policy in the CPUECTLR_EL1 and L2ECTLR registers. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>		2015-08-24 21:30:21 +05:30
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bl31	PSCI: Rework generic code to conform to coding guidelines	2015-08-13 23:48:07 +01:00
bl32	Pass arguments/results between EL3/S-EL1 via CPU registers (x0-x7)	2015-04-13 17:17:56 +01:00
common	Merge pull request #368 from jcastillo-arm/jc/genfw/1126	2015-08-21 15:28:30 +01:00
drivers	Use uintptr_t as base address type in ARM driver APIs	2015-07-09 11:53:32 +01:00
lib	Add macros for retention control in Cortex-A53/A57	2015-08-24 21:30:21 +05:30
plat	Merge pull request #362 from jcastillo-arm/jc/inline	2015-08-18 10:33:40 +01:00
stdlib	Enable type-checking of arguments passed to printf() et al.	2015-03-06 13:07:43 +00:00