johpow01 ef934cd17c fix(errata): workaround for Cortex-A710 2282622 ... Cortex-A710 erratum 2282622 is a Cat B erratum that applies to revisions r0p0, r1p0, and r2p0, and is fixed in r2p1. The workaround is to set CPUACTLR2_EL1[0] to 1, which will force PLDW/PFRM ST to behave like PLD/PRFM LD and not cause invalidations to other PE caches. SDEN can be found here: https://developer.arm.com/documentation/SDEN1775101 Signed-off-by: John Powell <john.powell@arm.com> Change-Id: Ic48409822536e9eacc003300036a1f0489593020		2022-03-09 00:04:02 +01:00
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aarch32	lib: cpus: aarch32: sanity check pointers before use	2021-02-23 15:16:51 +01:00
aarch64	fix(errata): workaround for Cortex-A710 2282622	2022-03-09 00:04:02 +01:00
cpu-ops.mk	fix(errata): workaround for Cortex-A710 2282622	2022-03-09 00:04:02 +01:00
errata_report.c	fix(errata_report): correct typo	2021-10-06 17:35:39 +02:00