Andrei Warkentin 2e5f84432d rpi: Implement PSCI CPU_OFF ... We simulate the PSCI CPU_OFF operation by reseting the core via RMR. For secondaries, that already puts them in the holding pen waiting for a "warm boot" request as part of PSCI CPU_ON. For the BSP, we have to add logic to distinguish a regular boot from a CPU_OFF state, where, like the secondaries, the BSP needs to wait foor a "warm boot" request as part of CPU_ON. Testing done: - ACS suite now passes more tests (since it repeatedly calls code on secondaries via CPU_ON). - Linux testing including offlining/onlineing CPU0, e.g. "echo 0 > /sys/devices/system/cpu/cpu0/online". Change-Id: Id0ae11a0ee0721b20fa2578b54dadc72dcbd69e0 Link: https://developer.trustedfirmware.org/T686 Signed-off-by: Andrei Warkentin <andrey.warkentin@gmail.com> [Andre: adapt to unified plat_helpers.S, smaller fixes] Signed-off-by: Andre Przywara <andre.przywara@arm.com>		2020-04-01 15:58:57 +01:00
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aarch64	rpi: move plat_helpers.S to common	2020-04-01 15:56:26 +01:00
include	rpi: Implement PSCI CPU_OFF	2020-04-01 15:58:57 +01:00
platform.mk	rpi: move plat_helpers.S to common	2020-04-01 15:56:26 +01:00
rpi4_bl31_setup.c	rpi3: console: Use same "clock-less" setup scheme as RPi4	2020-03-17 12:44:09 +00:00