Jiafei Pan 1b29fe534b feat(nxp/driver/dcfg): add some macro definition ... Added offset for register DEVDISR2 and DEVDISR3, added bit definiton for PORSR1_RCW, and some macro for SVR. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: Ie49392b89280c6c2c3510fcb4c85d827a1efdac0		2022-01-20 23:38:03 +08:00
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arch	feat(ccidx): update the do_dcsw_op function to support FEAT_CCIDX	2021-12-14 12:48:08 -06:00
bl1	Specify signed-ness of constants	2020-08-14 11:36:05 +00:00
bl2	BL2_AT_EL3: Enable pointer authentication support	2019-02-27 11:58:09 +00:00
bl2u	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
bl31	feat(rme): add ENABLE_RME build option and support for RMM image	2021-10-05 11:49:59 -05:00
bl32	spd: tlkd: support new TLK SMCs for RPMB service	2020-03-21 19:00:05 -07:00
common	feat(libfdt): also allow changing base address	2021-11-04 15:58:34 +00:00
drivers	feat(nxp/driver/dcfg): add some macro definition	2022-01-20 23:38:03 +08:00
dt-bindings	feat(dt-bindings): add STM32MP1 TZC400 bindings	2021-09-07 09:14:05 +02:00
export	refactor(plat/rockchip/rk3399/drivers/gpio): reduce code duplication	2022-01-04 15:26:43 +01:00
lib	feat(cpu/cortex_a53): add L1PCTL macro definiton for CPUACTLR_EL1	2022-01-13 18:00:46 +08:00
plat	feat(fvp): measure critical data	2021-12-08 13:08:17 +00:00
services	fix(rmmd): align RMI and GTSI FIDs with SMCCC	2021-12-08 10:15:21 +00:00
tools_share	feat(rme): add ENABLE_RME build option and support for RMM image	2021-10-05 11:49:59 -05:00