Yatharth Kochar 6083c841d0 GICv3: Allow either G1S or G0 interrupts to be configured ... Currently the GICv3 driver mandates that platform populate both G1S and G0 interrupts. However, it is possible that a given platform is not interested in both the groups and just needs to specify either one of them. This patch modifies the `gicv3_rdistif_init()` & `gicv3_distif_init()` functions to allow either G1S or G0 interrupts to be configured. Fixes ARM-software/tf-issues#400 Change-Id: I43572b0e08ae30bed5af9334f25d35bf439b0d2b		2016-09-12 16:19:08 +01:00
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common	Move private APIs in gic_common.h to a private header	2016-02-09 16:50:36 +00:00
v2	Move private APIs in gic_common.h to a private header	2016-02-09 16:50:36 +00:00
v3	GICv3: Allow either G1S or G0 interrupts to be configured	2016-09-12 16:19:08 +01:00
arm_gic.c	GIC: Ensure SGIs and PPIs are Group0 before setup	2016-07-07 11:59:33 +01:00
gic_v2.c	Fix race in GIC IPRIORITY and ITARGET accessors	2016-02-09 16:50:36 +00:00
gic_v3.c	Add support for %p in tf_printf()	2016-02-18 09:45:39 +00:00