59 lines
1.1 KiB
Diff
59 lines
1.1 KiB
Diff
tcc does not seem to support stmxcsr and ldmxcsr.
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Remove those. This migt break float exception handling but we
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are unlikely to need it.
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diff -U3 -r src/fenv/i386/fenv.s src/fenv/i386/fenv.s
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--- src/fenv/i386/fenv.s 2019-10-13 22:58:27.000000000 +0100
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+++ src/fenv/i386/fenv.s 2021-02-01 00:27:04.924135707 +0000
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@@ -17,7 +17,6 @@
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jz 1f
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fnclex
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1: push %edx
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- stmxcsr (%esp)
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pop %edx
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and $0x3f,%eax
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or %eax,%edx
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@@ -26,7 +25,6 @@
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not %ecx
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and %ecx,%edx
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push %edx
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- ldmxcsr (%esp)
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pop %edx
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1: xor %eax,%eax
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ret
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@@ -77,11 +75,9 @@
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pop %edx
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testl $0x02000000,(%edx)
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jz 1f
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- stmxcsr (%esp)
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shl $3,%ch
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andb $0x9f,1(%esp)
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or %ch,1(%esp)
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- ldmxcsr (%esp)
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1: pop %ecx
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ret
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@@ -107,7 +103,6 @@
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testl $0x02000000,(%edx)
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jz 1f
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push %eax
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- stmxcsr (%esp)
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pop %edx
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and $0x3f,%edx
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or %edx,4(%ecx)
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@@ -143,7 +138,6 @@
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shl $3,%ecx
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or $0x1f80,%ecx
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mov %ecx,4(%esp)
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- ldmxcsr 4(%esp)
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1: ret
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.global fetestexcept
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@@ -158,7 +152,6 @@
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pop %edx
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testl $0x02000000,(%edx)
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jz 1f
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- stmxcsr 4(%esp)
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or 4(%esp),%eax
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1: and %ecx,%eax
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ret
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