Flattens case structures as nyacc is giving consecutive cases as a
nested block like:
(case testA
(case testB
(case testC BODY)))
We convert to:
((case testA (expr-stmt))
(case testB (expr-stmt))
(case testC BODY))
And then treat them as independent cases. For the fallthrough we just
add a jump to each case's body right before its clause (each of the case
blocks is responsible of adding its own jump to its body):
// This doesn't have it because it's the first
CASE1:
testA
CASE1_BODY:
goto CASE2_BODY
CASE2:
testB
CASE2_BODY:
goto CASE3_BODY
CASE3:
testB
CASE3_BODY:
This enables complex fallthrough schemes comparing to what was done
before.
* module/mescc/compile.scm
(ast->info)[switch]{flatten-cases}: New variable.
(ast->info)[switch]{statements}: Use flatten-cases on it.
(switch->expr): Remove unneeded matchers and add jumps to body.
* build-aux/check-mescc.sh(xfail-tests): Remove
lib/tests/scaffold/66-local-char-array.c
This is a follow-up to commits
7a8a2fc517
mescc: x86_64 support: Refactor to abstracted assembly, add x86_64.
and
c9ba7a619b
mescc: Refactor variable declaration.
There was a debug "22" leaking in compile.scm. It should be a "0".
* module/mescc/compile.scm (init-local): Replace "22" with "0".
* lib/tests/scaffold/7v-struct-initialize-zeroes.c: New test.
* build-aux/check-mescc.sh (tcc_tests): Add it.
(xfail-tests): Remove lib/tests/scaffold/72-typedef-struct-def-local.c.
This instruction is used to compare two registers and set the flags
accordingly. In current architectures this is the same as r0-r1, but for
RISCV it will be different. RISC-V does not have condition flags so
(until a better solution) we are going to emulate them there.
* module/mescc/armv4/as.scm (armv4:instructions): Add r0-cmp-r1 as alias
of r0-r1.
* module/mescc/i386/as.scm: Same.
* module/mescc/x86_64/as.scm: Same.
* module/mescc/compile.scm (expr->register): Make use of the new
r0-cmp-r1 instruction.
M1 immediates are limited to 31-bit before they become negative.
* module/mescc/x86_64/as.scm (x86_64:value->r, x86_64:r-cmp-value,
x86_64:r-long-mem-add, x86_64:r-and): Limit M1 immediate to #x80000000.
* lib/tests/scaffold/67-m1-overflow-check.c: New test.
* build-aux/check-mescc.sh (mes_tests): Add it.
This inexplicably fixes a segfault in tcc-boot0.
* module/mescc/armv4/as.scm (armv4:r0/r1): Instead of using "push 0",
use explicit slot for remainder.
* lib/arm-mes/arm.M1 (mov____%esp,%r3): New macro.
* module/mescc/armv4/as.scm (armv4:r0%r1): Use it to avoid overwriting
%r0 before caling __mesabi_uldiv.
Currently, sign-extension (CLTD vs XOR EDX) and signed division (IDIV vs
DIV) selected by setting "signed?". See, module/mescc/x86/as.scm.
Possibly we need a signed? based on numerator and denominator, and
add a extend-sign? based on the signedness of the numerator?
* module/mescc/compile.scm (expr->register): Base "signed?" strictly on
signedness of numerator.
* module/mescc/mescc.scm (M1->hex2): Update to use --little-endian.
(hex2->elf): Likewise, and --base-address.
* module/mescc/mescc.scm (hex2->elf): Likewise, and remove
--exec_enable.
Fixes https://savannah.nongnu.org/task/?16067.
Reported via savannah by Ineiev <ineiev@gnu.org>.
* mes/module/mes/lalr.scm,
module/mes/getopt-long.scm,
module/mes/optargs.scm: Change header to GNU Mes header with GPL v3.
The ARM port added the `-marm' option to mescc, where previously only
-m32' (the default) and `-m64' were supported.
Reported by Vagrant Cascadian <vagrant@reproducible-builds.org>.
* module/mescc/mescc.scm (arch-get-machine): When machine is "arm",
return "32".
* build-aux/build-mes.sh (LIBS)[mescc]: Add -lmescc.
This makes function alignment optional and disables function alignment
when using MesCC-Tools 0.5.2 (numbered architecture).
* module/mescc.scm (parse-opts): Make --align take a value.
* module/mescc/mescc.scm (mescc:compile, infos->hex2): Parse it and pass
it as renamed #:align keyword argument to ...
* module/mescc/M1.scm (infos->M1): ...here. Rename parameter align? to
align, pass it to...
(info->M1): ...here. Likewise. Use it to make function alignment
optional.
* module/mescc/mescc.scm (arch-get-define): Rename
to... (arch-get-defines): ...this. Return a list of defines: Also
adding __SIZEOF_INT__, __SIZEOF_LONG__, and add __SIZEOF_LONG_LONG__ if
it's >=8.
(mescc:preprocess, c->info): Update callers.
* include/stdint.h[!__SIZEOF_LONG_LONG__]: Remove typedefs for int64_t,
uint16_t.
This fixes 36-compare-arithmetic.c
* module/mescc/i386/as.scm (i386:r0/r1, i386:r0%r1): Do not reset
signed?.
* module/mescc/x86_64/as.scm (x86_64:r0/r1, x86_64:r0%r1): Likewise.
* lib/tests/scaffold/36-compare-arithmetic.c (main): Use unique exit
value per failure.
After setting-up a buld environment, running something like
~/src/mes/wip/pre-inst-env mescc -v -v ~/src/mes/wip/scaffold/main.c
works again.
TODO: Make this less complex.
* The mescc-lib (and gcc-lib) build directories do not help;
these were introduced to support `wip-autotools'.
* We used to opt for short *PATH variables: "." rather than
/gnu/store/.... or /home/janneke/src/mes/master to avoid
filling the MES arena. XXX Has this been solved?
* In the Guix bootstrap, we run module/mescc.scm directly
$MES -e '(mescc)' module/mescc.scm
...so that's why these overrides started to appear in multiple
places.
* build-aux/pre-inst-env.in (MES_UNINSTALLED): New variable.
* scripts/mescc.in (includedir,libdir): Use it to override these.
* module/mescc/mescc.scm (arch-find): Use it to add <lib>-messc.
* lib/mes/div.c (__aeabi_idiv): Move for conditional compilation.
(__mesabi_idiv): New procedure.
* module/mescc/armv4/as.scm (armv4:r0/r1): Use __mesabi_idiv.
* module/mescc/armv4/as.scm (optimize-immediate): New macro.
(immediate->r0): Use it.
(armv4:value->r): Use it.
(armv4:local->r): Use it.
(armv4:r->local+n): Use it.
(armv4:r-byte-mem-add): Use it.
(armv4:r-word-mem-add): Use it.
(armv4:local-ptr->r): Use it.
(armv4:r+value): Use it.
(armv4:r-cmp-value): Use it.
(armv4:r0+value): Use it.
(armv4:byte-r->local+n): Use it.
(armv4:word-r->local+n): Use it.
Janneke Nieuwenhuizen
Ekaitz
Andrius Štikonas
W. J. van der Laan
Danny Milosavljevic