arm-trusted-firmware/plat/arm/board/arm_fpga/include/plat_macros.S

/*
 * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#ifndef PLAT_MACROS_S
#define PLAT_MACROS_S

.macro plat_crash_print_regs
.endm

#endif
plat/arm/board/arm_fpga: Enable basic BL31 port for an FPGA image This adds the minimal functions and definitions to create a basic BL31 port for an initial FPGA image, in order for the port to be uploaded to one the FPGA boards operated by an internal group within Arm, such that BL31 runs as a payload for an image. Future changes will enable the port for a wide range of system configurations running on the FPGA boards to ensure compatibility with multiple FPGA images. It is expected that this will replace the FPGA fork of the Linux kernel bootwrapper by performing similar secure-world initialization and setup through the use of drivers and other well-established methods, before passing control to the kernel, which will act as the BL33 payload and run in EL2NS. This change introduces a basic, loadable port with the console initialized by setting the baud rate and base address of the UART as configured by the Zeus image. It is a BL31-only port, and RESET_TO_BL31 is enabled to reflect this. Signed-off-by: Oliver Swede <oli.swede@arm.com> Change-Id: I1817ad81be00afddcdbbda1ab70eb697203178e2 2019-11-11 11:11:06 +00:00			`/*`
			`* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.`
			`*`
			`* SPDX-License-Identifier: BSD-3-Clause`
			`*/`

			`#ifndef PLAT_MACROS_S`
			`#define PLAT_MACROS_S`

			`.macro plat_crash_print_regs`
			`.endm`

			`#endif`