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arm-trusted-firmware/services/std_svc/psci/psci_private.h

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ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
/*
Update year in copyright text to 2014 Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60
2014-01-14 18:17:09 +00:00
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* Neither the name of ARM nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __PSCI_PRIVATE_H__
#define __PSCI_PRIVATE_H__
psci: replace secure context with suspend context The secure context saved and restored across a cpu_suspend operation can be more than just the state of the secure system registers e.g. we also need to save the affinity level till which the cpu is being powered down. This patch creates a suspend_context data structure which includes the system register context. This will allow other bits to be saved and restored as well in subsequent patches. Change-Id: I1c1f7d25497388b54b7d6ee4fab77e8c6a9992c4
2013-12-05 14:21:04 +00:00
#include <arch.h>
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
#include <bakery_lock.h>
Rework internal API to save non-secure entry point info This patch replaces the internal psci_save_ns_entry() API with a psci_get_ns_ep_info() API. The new function splits the work done by the previous one such that it populates and returns an 'entry_point_info_t' structure with the information to enter the normal world upon completion of the CPU_SUSPEND or CPU_ON call. This information is used to populate the non-secure context structure separately. This allows the new internal API `psci_get_ns_ep_info` to return error and enable the code to return safely. Change-Id: Ifd87430a4a3168eac0ebac712f59c93cbad1b231
2015-01-06 15:36:38 +00:00
#include <bl_common.h>
Reduce deep nesting of header files Reduce the number of header files included from other header files as much as possible without splitting the files. Use forward declarations where possible. This allows removal of some unnecessary "#ifndef __ASSEMBLY__" statements. Also, review the .c and .S files for which header files really need including and reorder the #include statements alphabetically. Fixes ARM-software/tf-issues#31 Change-Id: Iec92fb976334c77453e010b60bcf56f3be72bd3e
2014-04-09 13:14:54 +01:00
#include <psci.h>
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
Move bakery algorithm implementation out of coherent memory This patch moves the bakery locks out of coherent memory to normal memory. This implies that the lock information needs to be placed on a separate cache line for each cpu. Hence the bakery_lock_info_t structure is allocated in the per-cpu data so as to minimize memory wastage. A similar platform per-cpu data is introduced for the platform locks. As a result of the above changes, the bakery lock api is completely changed. Earlier, a reference to the lock structure was passed to the lock implementation. Now a unique-id (essentially an index into the per-cpu data array) and an offset into the per-cpu data for bakery_info_t needs to be passed to the lock implementation. Change-Id: I1e76216277448713c6c98b4c2de4fb54198b39e0
2015-01-08 18:02:19 +00:00
/*
* The following helper macros abstract the interface to the Bakery
* Lock API.
*/
#if USE_COHERENT_MEM
#define psci_lock_init(aff_map, idx) bakery_lock_init(&(aff_map)[(idx)].lock)
#define psci_lock_get(node) bakery_lock_get(&((node)->lock))
#define psci_lock_release(node) bakery_lock_release(&((node)->lock))
Correctly dimension the PSCI aff_map_node array The array of affinity nodes is currently allocated for 32 entries with the PSCI_NUM_AFFS value defined in psci.h. This is not enough for large systems, and will substantially over allocate the array for small systems. This patch introduces an optional platform definition PLATFORM_NUM_AFFS to platform_def.h. If defined this value is used for PSCI_NUM_AFFS, otherwise a value of two times the number of CPU cores is used. The FVP port defines PLATFORM_NUM_AFFS to be 10 which saves nearly 1.5KB of memory. Fixes ARM-software/tf-issues#192 Change-Id: I68e30ac950de88cfbd02982ba882a18fb69c1445
2014-06-20 00:36:14 +01:00
#else
Move bakery algorithm implementation out of coherent memory This patch moves the bakery locks out of coherent memory to normal memory. This implies that the lock information needs to be placed on a separate cache line for each cpu. Hence the bakery_lock_info_t structure is allocated in the per-cpu data so as to minimize memory wastage. A similar platform per-cpu data is introduced for the platform locks. As a result of the above changes, the bakery lock api is completely changed. Earlier, a reference to the lock structure was passed to the lock implementation. Now a unique-id (essentially an index into the per-cpu data array) and an offset into the per-cpu data for bakery_info_t needs to be passed to the lock implementation. Change-Id: I1e76216277448713c6c98b4c2de4fb54198b39e0
2015-01-08 18:02:19 +00:00
#define psci_lock_init(aff_map, idx) ((aff_map)[(idx)].aff_map_index = (idx))
#define psci_lock_get(node) bakery_lock_get((node)->aff_map_index, \
CPU_DATA_PSCI_LOCK_OFFSET)
#define psci_lock_release(node) bakery_lock_release((node)->aff_map_index,\
CPU_DATA_PSCI_LOCK_OFFSET)
Correctly dimension the PSCI aff_map_node array The array of affinity nodes is currently allocated for 32 entries with the PSCI_NUM_AFFS value defined in psci.h. This is not enough for large systems, and will substantially over allocate the array for small systems. This patch introduces an optional platform definition PLATFORM_NUM_AFFS to platform_def.h. If defined this value is used for PSCI_NUM_AFFS, otherwise a value of two times the number of CPU cores is used. The FVP port defines PLATFORM_NUM_AFFS to be 10 which saves nearly 1.5KB of memory. Fixes ARM-software/tf-issues#192 Change-Id: I68e30ac950de88cfbd02982ba882a18fb69c1445
2014-06-20 00:36:14 +01:00
#endif
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
/*******************************************************************************
* The following two data structures hold the topology tree which in turn tracks
* the state of the all the affinity instances supported by the platform.
******************************************************************************/
Always use named structs in header files Add tag names to all unnamed structs in header files. This allows forward declaration of structs, which is necessary to reduce header file nesting (to be implemented in a subsequent commit). Also change the typedef names across the codebase to use the _t suffix to be more conformant with the Linux coding style. The coding style actually prefers us not to use typedefs at all but this is considered a step too far for Trusted Firmware. Also change the IO framework structs defintions to use typedef'd structs to be consistent with the rest of the codebase. Change-Id: I722b2c86fc0d92e4da3b15e5cab20373dd26786f
2014-04-10 15:37:22 +01:00
typedef struct aff_map_node {
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
unsigned long mpidr;
Move bakery algorithm implementation out of coherent memory This patch moves the bakery locks out of coherent memory to normal memory. This implies that the lock information needs to be placed on a separate cache line for each cpu. Hence the bakery_lock_info_t structure is allocated in the per-cpu data so as to minimize memory wastage. A similar platform per-cpu data is introduced for the platform locks. As a result of the above changes, the bakery lock api is completely changed. Earlier, a reference to the lock structure was passed to the lock implementation. Now a unique-id (essentially an index into the per-cpu data array) and an offset into the per-cpu data for bakery_info_t needs to be passed to the lock implementation. Change-Id: I1e76216277448713c6c98b4c2de4fb54198b39e0
2015-01-08 18:02:19 +00:00
unsigned char ref_count;
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
unsigned char state;
psci: fix affinity level upgrade issue The psci implementation does not track target affinity level requests specified during cpu_suspend calls correctly as per the following example. 1. cpu0.cluster0 calls cpu_suspend with the target affinity level as 0 2. Only the cpu0.cluster0 is powered down while cluster0 remains powered up 3. cpu1.cluster0 calls cpu_off to power itself down to highest possible affinity level 4. cluster0 will be powered off even though cpu0.cluster0 does not allow cluster shutdown This patch introduces reference counts at affinity levels > 0 to track the number of cpus which want an affinity instance at level X to remain powered up. This instance can be turned off only if its reference count is 0. Cpus still undergo the normal state transitions (ON, OFF, ON_PENDING, SUSPEND) but the higher levels can only be either ON or OFF depending upon their reference count. The above issue is thus fixed as follows: 1. cluster0's reference count is incremented by two when cpu0 and cpu1 are initially powered on. 2. cpu0.cluster0 calls cpu_suspend with the target affinity level as 0. This does not affect the cluster0 reference count. 3. Only the cpu0.cluster0 is powered down while cluster0 remains powered up as it has a non-zero reference count. 4. cpu1.cluster0 call cpu_off to power itself down to highest possible affinity level. This decrements the cluster0 reference count. 5. cluster0 is still not powered off since its reference count will at least be 1 due to the restriction placed by cpu0. Change-Id: I433dfe82b946f5f6985b1602c2de87800504f7a9
2013-12-05 16:33:10 +00:00
unsigned char level;
Move bakery algorithm implementation out of coherent memory This patch moves the bakery locks out of coherent memory to normal memory. This implies that the lock information needs to be placed on a separate cache line for each cpu. Hence the bakery_lock_info_t structure is allocated in the per-cpu data so as to minimize memory wastage. A similar platform per-cpu data is introduced for the platform locks. As a result of the above changes, the bakery lock api is completely changed. Earlier, a reference to the lock structure was passed to the lock implementation. Now a unique-id (essentially an index into the per-cpu data array) and an offset into the per-cpu data for bakery_info_t needs to be passed to the lock implementation. Change-Id: I1e76216277448713c6c98b4c2de4fb54198b39e0
2015-01-08 18:02:19 +00:00
#if USE_COHERENT_MEM
Always use named structs in header files Add tag names to all unnamed structs in header files. This allows forward declaration of structs, which is necessary to reduce header file nesting (to be implemented in a subsequent commit). Also change the typedef names across the codebase to use the _t suffix to be more conformant with the Linux coding style. The coding style actually prefers us not to use typedefs at all but this is considered a step too far for Trusted Firmware. Also change the IO framework structs defintions to use typedef'd structs to be consistent with the rest of the codebase. Change-Id: I722b2c86fc0d92e4da3b15e5cab20373dd26786f
2014-04-10 15:37:22 +01:00
bakery_lock_t lock;
Move bakery algorithm implementation out of coherent memory This patch moves the bakery locks out of coherent memory to normal memory. This implies that the lock information needs to be placed on a separate cache line for each cpu. Hence the bakery_lock_info_t structure is allocated in the per-cpu data so as to minimize memory wastage. A similar platform per-cpu data is introduced for the platform locks. As a result of the above changes, the bakery lock api is completely changed. Earlier, a reference to the lock structure was passed to the lock implementation. Now a unique-id (essentially an index into the per-cpu data array) and an offset into the per-cpu data for bakery_info_t needs to be passed to the lock implementation. Change-Id: I1e76216277448713c6c98b4c2de4fb54198b39e0
2015-01-08 18:02:19 +00:00
#else
/* For indexing the bakery_info array in per CPU data */
unsigned char aff_map_index;
#endif
Always use named structs in header files Add tag names to all unnamed structs in header files. This allows forward declaration of structs, which is necessary to reduce header file nesting (to be implemented in a subsequent commit). Also change the typedef names across the codebase to use the _t suffix to be more conformant with the Linux coding style. The coding style actually prefers us not to use typedefs at all but this is considered a step too far for Trusted Firmware. Also change the IO framework structs defintions to use typedef'd structs to be consistent with the rest of the codebase. Change-Id: I722b2c86fc0d92e4da3b15e5cab20373dd26786f
2014-04-10 15:37:22 +01:00
} aff_map_node_t;
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
Always use named structs in header files Add tag names to all unnamed structs in header files. This allows forward declaration of structs, which is necessary to reduce header file nesting (to be implemented in a subsequent commit). Also change the typedef names across the codebase to use the _t suffix to be more conformant with the Linux coding style. The coding style actually prefers us not to use typedefs at all but this is considered a step too far for Trusted Firmware. Also change the IO framework structs defintions to use typedef'd structs to be consistent with the rest of the codebase. Change-Id: I722b2c86fc0d92e4da3b15e5cab20373dd26786f
2014-04-10 15:37:22 +01:00
typedef struct aff_limits_node {
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
int min;
int max;
Always use named structs in header files Add tag names to all unnamed structs in header files. This allows forward declaration of structs, which is necessary to reduce header file nesting (to be implemented in a subsequent commit). Also change the typedef names across the codebase to use the _t suffix to be more conformant with the Linux coding style. The coding style actually prefers us not to use typedefs at all but this is considered a step too far for Trusted Firmware. Also change the IO framework structs defintions to use typedef'd structs to be consistent with the rest of the codebase. Change-Id: I722b2c86fc0d92e4da3b15e5cab20373dd26786f
2014-04-10 15:37:22 +01:00
} aff_limits_node_t;
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
Fix the array size of mpidr_aff_map_nodes_t. This patch fixes the array size of mpidr_aff_map_nodes_t which was less by one element. Fixes ARM-software/tf-issues#264 Change-Id: I48264f6f9e7046a3d0f4cbcd63b9ba49657e8818
2014-12-04 14:14:12 +00:00
typedef aff_map_node_t (*mpidr_aff_map_nodes_t[MPIDR_MAX_AFFLVL + 1]);
Remove current CPU mpidr from PSCI common code Many of the interfaces internal to PSCI pass the current CPU MPIDR_EL1 value from function to function. This is not required, and with inline access to the system registers is less efficient than requiring the code to read that register whenever required. This patch remove the mpidr parameter from the affected interfaces and reduces code in FVP BL3-1 size by 160 bytes. Change-Id: I16120a7c6944de37232016d7e109976540775602
2014-06-09 12:44:21 +01:00
typedef unsigned int (*afflvl_power_on_finisher_t)(aff_map_node_t *);
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
/*******************************************************************************
* Data prototypes
******************************************************************************/
Remove variables from .data section Update code base to remove variables from the .data section, mainly by using const static data where possible and adding the const specifier as required. Most changes are to the IO subsystem, including the framework APIs. The FVP power management code is also affected. Delay initialization of the global static variable, next_image_type in bl31_main.c, until it is realy needed. Doing this moves the variable from the .data to the .bss section. Also review the IO interface for inconsistencies, using uintptr_t where possible instead of void *. Remove the io_handle and io_dev_handle typedefs, which were unnecessary, replacing instances with uintptr_t. Fixes ARM-software/tf-issues#107. Change-Id: I085a62197c82410b566e4698e5590063563ed304
2014-04-23 13:47:06 +01:00
extern const plat_pm_ops_t *psci_plat_pm_ops;
Always use named structs in header files Add tag names to all unnamed structs in header files. This allows forward declaration of structs, which is necessary to reduce header file nesting (to be implemented in a subsequent commit). Also change the typedef names across the codebase to use the _t suffix to be more conformant with the Linux coding style. The coding style actually prefers us not to use typedefs at all but this is considered a step too far for Trusted Firmware. Also change the IO framework structs defintions to use typedef'd structs to be consistent with the rest of the codebase. Change-Id: I722b2c86fc0d92e4da3b15e5cab20373dd26786f
2014-04-10 15:37:22 +01:00
extern aff_map_node_t psci_aff_map[PSCI_NUM_AFFS];
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
Add power management support in the SPD This patch implements a set of handlers in the SPD which are called by the PSCI runtime service upon receiving a power management operation. These handlers in turn pass control to the Secure Payload image if required before returning control to PSCI. This ensures that the Secure Payload has complete visibility of all power transitions in the system and can prepare accordingly. Change-Id: I2d1dba5629b7cf2d53999d39fe807dfcf3f62fe2
2014-02-09 18:24:19 +00:00
/*******************************************************************************
Implement late binding for runtime hooks At present SPD power management hooks and BL3-2 entry are implemented using weak references. This would have the handlers bound and registered with the core framework at build time, but leaves them dangling if a service fails to initialize at runtime. This patch replaces implementation by requiring runtime handlers to register power management and deferred initialization hooks with the core framework at runtime. The runtime services are to register the hooks only as the last step, after having all states successfully initialized. Change-Id: Ibe788a2a381ef39aec1d4af5ba02376e67269782
2014-02-20 17:11:00 +00:00
* SPD's power management hooks registered with PSCI
Add power management support in the SPD This patch implements a set of handlers in the SPD which are called by the PSCI runtime service upon receiving a power management operation. These handlers in turn pass control to the Secure Payload image if required before returning control to PSCI. This ensures that the Secure Payload has complete visibility of all power transitions in the system and can prepare accordingly. Change-Id: I2d1dba5629b7cf2d53999d39fe807dfcf3f62fe2
2014-02-09 18:24:19 +00:00
******************************************************************************/
Always use named structs in header files Add tag names to all unnamed structs in header files. This allows forward declaration of structs, which is necessary to reduce header file nesting (to be implemented in a subsequent commit). Also change the typedef names across the codebase to use the _t suffix to be more conformant with the Linux coding style. The coding style actually prefers us not to use typedefs at all but this is considered a step too far for Trusted Firmware. Also change the IO framework structs defintions to use typedef'd structs to be consistent with the rest of the codebase. Change-Id: I722b2c86fc0d92e4da3b15e5cab20373dd26786f
2014-04-10 15:37:22 +01:00
extern const spd_pm_ops_t *psci_spd_pm;
Add power management support in the SPD This patch implements a set of handlers in the SPD which are called by the PSCI runtime service upon receiving a power management operation. These handlers in turn pass control to the Secure Payload image if required before returning control to PSCI. This ensures that the Secure Payload has complete visibility of all power transitions in the system and can prepare accordingly. Change-Id: I2d1dba5629b7cf2d53999d39fe807dfcf3f62fe2
2014-02-09 18:24:19 +00:00
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
/*******************************************************************************
* Function prototypes
******************************************************************************/
/* Private exported functions from psci_common.c */
Remove extern keyword from function declarations Function declarations implicitly have external linkage so do not need the extern keyword. Change-Id: Ia0549786796d8bf5956487e8996450a0b3d79f32
2014-05-14 12:38:32 +01:00
int get_max_afflvl(void);
unsigned short psci_get_state(aff_map_node_t *node);
unsigned short psci_get_phys_state(aff_map_node_t *node);
void psci_set_state(aff_map_node_t *node, unsigned short state);
unsigned long mpidr_set_aff_inst(unsigned long, unsigned char, int);
int psci_validate_mpidr(unsigned long, int);
Add PSCI service specific per-CPU data This patch adds a structure defined by the PSCI service to the per-CPU data array. The structure is used to save the 'power_state' parameter specified during a 'cpu_suspend' call on the current CPU. This parameter was being saved in the cpu node in the PSCI topology tree earlier. The existing API to return the state id specified during a PSCI CPU_SUSPEND call i.e. psci_get_suspend_stateid(mpidr) has been renamed to psci_get_suspend_stateid_by_mpidr(mpidr). The new psci_get_suspend_stateid() API returns the state id of the current cpu. The psci_get_suspend_afflvl() API has been changed to return the target affinity level of the current CPU. This was specified using the 'mpidr' parameter in the old implementation. The behaviour of the get_power_on_target_afflvl() has been tweaked such that traversal of the PSCI topology tree to locate the affinity instance node for the current CPU is done only in the debug build as it is an expensive operation. Change-Id: Iaad49db75abda471f6a82d697ee6e0df554c4caf
2014-07-25 14:52:47 +01:00
int get_power_on_target_afflvl(void);
Remove current CPU mpidr from PSCI common code Many of the interfaces internal to PSCI pass the current CPU MPIDR_EL1 value from function to function. This is not required, and with inline access to the system registers is less efficient than requiring the code to read that register whenever required. This patch remove the mpidr parameter from the affected interfaces and reduces code in FVP BL3-1 size by 160 bytes. Change-Id: I16120a7c6944de37232016d7e109976540775602
2014-06-09 12:44:21 +01:00
void psci_afflvl_power_on_finish(int,
Remove extern keyword from function declarations Function declarations implicitly have external linkage so do not need the extern keyword. Change-Id: Ia0549786796d8bf5956487e8996450a0b3d79f32
2014-05-14 12:38:32 +01:00
int,
afflvl_power_on_finisher_t *);
Rework internal API to save non-secure entry point info This patch replaces the internal psci_save_ns_entry() API with a psci_get_ns_ep_info() API. The new function splits the work done by the previous one such that it populates and returns an 'entry_point_info_t' structure with the information to enter the normal world upon completion of the CPU_SUSPEND or CPU_ON call. This information is used to populate the non-secure context structure separately. This allows the new internal API `psci_get_ns_ep_info` to return error and enable the code to return safely. Change-Id: Ifd87430a4a3168eac0ebac712f59c93cbad1b231
2015-01-06 15:36:38 +00:00
int psci_get_ns_ep_info(entry_point_info_t *ep,
uint64_t entrypoint, uint64_t context_id);
Remove extern keyword from function declarations Function declarations implicitly have external linkage so do not need the extern keyword. Change-Id: Ia0549786796d8bf5956487e8996450a0b3d79f32
2014-05-14 12:38:32 +01:00
int psci_check_afflvl_range(int start_afflvl, int end_afflvl);
Rework state management in the PSCI implementation This patch pulls out state management from the affinity level specific handlers into the top level functions specific to the operation i.e. psci_afflvl_suspend(), psci_afflvl_on() etc. In the power down path this patch will allow an affinity instance at level X to determine the state that an affinity instance at level X+1 will enter before the level specific handlers are called. This will be useful to determine whether a CPU is the last in the cluster during a suspend/off request and so on. Similarly, in the power up path this patch will allow an affinity instance at level X to determine the state that an affinity instance at level X+1 has emerged from, even after the level specific handlers have been called. This will be useful in determining whether a CPU is the first in the cluster during a on/resume request and so on. As before, while powering down, state is updated before the level specific handlers are invoked so that they can perform actions based upon their target state. While powering up, state is updated after the level specific handlers have been invoked so that they can perform actions based upon the state they emerged from. Change-Id: I40fe64cb61bb096c66f88f6d493a1931243cfd37
2014-07-28 00:09:01 +01:00
void psci_do_afflvl_state_mgmt(uint32_t start_afflvl,
uint32_t end_afflvl,
Miscellaneous PSCI code cleanups This patch implements the following cleanups in PSCI generic code: 1. It reworks the affinity level specific handlers in the PSCI implementation such that. a. Usage of the 'rc' local variable is restricted to only where it is absolutely needed b. 'plat_state' local variable is defined only when a direct invocation of plat_get_phys_state() does not suffice. c. If a platform handler is not registered then the level specific handler returns early. 2. It limits the use of the mpidr_aff_map_nodes_t typedef to declaration of arrays of the type instead of using it in function prototypes as well. 3. It removes dangling declarations of __psci_cpu_off() and __psci_cpu_suspend(). The definitions of these functions were removed in earlier patches. Change-Id: I51e851967c148be9c2eeda3a3c41878f7b4d6978
2014-07-28 00:15:23 +01:00
aff_map_node_t *mpidr_nodes[],
Rework state management in the PSCI implementation This patch pulls out state management from the affinity level specific handlers into the top level functions specific to the operation i.e. psci_afflvl_suspend(), psci_afflvl_on() etc. In the power down path this patch will allow an affinity instance at level X to determine the state that an affinity instance at level X+1 will enter before the level specific handlers are called. This will be useful to determine whether a CPU is the last in the cluster during a suspend/off request and so on. Similarly, in the power up path this patch will allow an affinity instance at level X to determine the state that an affinity instance at level X+1 has emerged from, even after the level specific handlers have been called. This will be useful in determining whether a CPU is the first in the cluster during a on/resume request and so on. As before, while powering down, state is updated before the level specific handlers are invoked so that they can perform actions based upon their target state. While powering up, state is updated after the level specific handlers have been invoked so that they can perform actions based upon the state they emerged from. Change-Id: I40fe64cb61bb096c66f88f6d493a1931243cfd37
2014-07-28 00:09:01 +01:00
uint32_t state);
Remove current CPU mpidr from PSCI common code Many of the interfaces internal to PSCI pass the current CPU MPIDR_EL1 value from function to function. This is not required, and with inline access to the system registers is less efficient than requiring the code to read that register whenever required. This patch remove the mpidr parameter from the affected interfaces and reduces code in FVP BL3-1 size by 160 bytes. Change-Id: I16120a7c6944de37232016d7e109976540775602
2014-06-09 12:44:21 +01:00
void psci_acquire_afflvl_locks(int start_afflvl,
Miscellaneous PSCI code cleanups This patch implements the following cleanups in PSCI generic code: 1. It reworks the affinity level specific handlers in the PSCI implementation such that. a. Usage of the 'rc' local variable is restricted to only where it is absolutely needed b. 'plat_state' local variable is defined only when a direct invocation of plat_get_phys_state() does not suffice. c. If a platform handler is not registered then the level specific handler returns early. 2. It limits the use of the mpidr_aff_map_nodes_t typedef to declaration of arrays of the type instead of using it in function prototypes as well. 3. It removes dangling declarations of __psci_cpu_off() and __psci_cpu_suspend(). The definitions of these functions were removed in earlier patches. Change-Id: I51e851967c148be9c2eeda3a3c41878f7b4d6978
2014-07-28 00:15:23 +01:00
int end_afflvl,
aff_map_node_t *mpidr_nodes[]);
Remove current CPU mpidr from PSCI common code Many of the interfaces internal to PSCI pass the current CPU MPIDR_EL1 value from function to function. This is not required, and with inline access to the system registers is less efficient than requiring the code to read that register whenever required. This patch remove the mpidr parameter from the affected interfaces and reduces code in FVP BL3-1 size by 160 bytes. Change-Id: I16120a7c6944de37232016d7e109976540775602
2014-06-09 12:44:21 +01:00
void psci_release_afflvl_locks(int start_afflvl,
Remove extern keyword from function declarations Function declarations implicitly have external linkage so do not need the extern keyword. Change-Id: Ia0549786796d8bf5956487e8996450a0b3d79f32
2014-05-14 12:38:32 +01:00
int end_afflvl,
mpidr_aff_map_nodes_t mpidr_nodes);
Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs This patch adds support for SYSTEM_OFF and SYSTEM_RESET PSCI operations. A platform should export handlers to complete the requested operation. The FVP port exports fvp_system_off() and fvp_system_reset() as an example. If the SPD provides a power management hook for system off and system reset, then the SPD is notified about the corresponding operation so it can do some bookkeeping. The TSPD exports tspd_system_off() and tspd_system_reset() for that purpose. Versatile Express shutdown and reset methods have been removed from the FDT as new PSCI sys_poweroff and sys_reset services have been added. For those kernels that do not support yet these PSCI services (i.e. GICv3 kernel), the original dtsi files have been renamed to *-no_psci.dtsi. Fixes ARM-software/tf-issues#218 Change-Id: Ic8a3bf801db979099ab7029162af041c4e8330c8
2014-08-12 11:17:06 +01:00
void psci_print_affinity_map(void);
Add APIs to preserve highest affinity level in OFF state This patch adds APIs to find, save and retrieve the highest affinity level which will enter or exit from the physical OFF state during a PSCI power management operation. The level is stored in per-cpu data. It then reworks the PSCI implementation to perform cache maintenance only when the handler for the highest affinity level to enter/exit the OFF state is called. For example. during a CPU_SUSPEND operation, state management is done prior to calling the affinity level specific handlers. The highest affinity level which will be turned off is determined using the psci_find_max_phys_off_afflvl() API. This level is saved using the psci_set_max_phys_off_afflvl() API. In the code that does generic handling for each level, prior to performing cache maintenance it is first determined if the current affinity level matches the value returned by psci_get_max_phys_off_afflvl(). Cache maintenance is done if the values match. This change allows the last CPU in a cluster to perform cache maintenance independently. Earlier, cache maintenance was started in the level 0 handler and finished in the level 1 handler. This change in approach will facilitate implementation of tf-issues#98. Change-Id: I57233f0a27b3ddd6ddca6deb6a88b234525b0ae6
2014-07-31 11:19:11 +01:00
void psci_set_max_phys_off_afflvl(uint32_t afflvl);
uint32_t psci_find_max_phys_off_afflvl(uint32_t start_afflvl,
uint32_t end_afflvl,
Miscellaneous PSCI code cleanups This patch implements the following cleanups in PSCI generic code: 1. It reworks the affinity level specific handlers in the PSCI implementation such that. a. Usage of the 'rc' local variable is restricted to only where it is absolutely needed b. 'plat_state' local variable is defined only when a direct invocation of plat_get_phys_state() does not suffice. c. If a platform handler is not registered then the level specific handler returns early. 2. It limits the use of the mpidr_aff_map_nodes_t typedef to declaration of arrays of the type instead of using it in function prototypes as well. 3. It removes dangling declarations of __psci_cpu_off() and __psci_cpu_suspend(). The definitions of these functions were removed in earlier patches. Change-Id: I51e851967c148be9c2eeda3a3c41878f7b4d6978
2014-07-28 00:15:23 +01:00
aff_map_node_t *mpidr_nodes[]);
psci: rectify and homogenise generic code This patch performs a major rework of the psci generic implementation to achieve the following: 1. replace recursion with iteration where possible to aid code readability e.g. affinity instance states are changed iteratively instead of recursively. 2. acquire pointers to affinity instance nodes at the beginning of a psci operation. All subsequent actions use these pointers instead of calling psci_get_aff_map_node() repeatedly e.g. management of locks has been abstracted under functions which use these pointers to ensure correct ordering. Helper functions have been added to create these abstractions. 3. assertions have been added to cpu level handlers to ensure correct state transition 4. the affinity level extents specified to various functions have the same meaning i.e. start level is always less than the end level. Change-Id: If0508c3a7b20ea3ddda2a66128429382afc3dfc8
2013-12-02 17:33:04 +00:00
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
/* Private exported functions from psci_setup.c */
Remove extern keyword from function declarations Function declarations implicitly have external linkage so do not need the extern keyword. Change-Id: Ia0549786796d8bf5956487e8996450a0b3d79f32
2014-05-14 12:38:32 +01:00
int psci_get_aff_map_nodes(unsigned long mpidr,
int start_afflvl,
int end_afflvl,
Miscellaneous PSCI code cleanups This patch implements the following cleanups in PSCI generic code: 1. It reworks the affinity level specific handlers in the PSCI implementation such that. a. Usage of the 'rc' local variable is restricted to only where it is absolutely needed b. 'plat_state' local variable is defined only when a direct invocation of plat_get_phys_state() does not suffice. c. If a platform handler is not registered then the level specific handler returns early. 2. It limits the use of the mpidr_aff_map_nodes_t typedef to declaration of arrays of the type instead of using it in function prototypes as well. 3. It removes dangling declarations of __psci_cpu_off() and __psci_cpu_suspend(). The definitions of these functions were removed in earlier patches. Change-Id: I51e851967c148be9c2eeda3a3c41878f7b4d6978
2014-07-28 00:15:23 +01:00
aff_map_node_t *mpidr_nodes[]);
Remove extern keyword from function declarations Function declarations implicitly have external linkage so do not need the extern keyword. Change-Id: Ia0549786796d8bf5956487e8996450a0b3d79f32
2014-05-14 12:38:32 +01:00
aff_map_node_t *psci_get_aff_map_node(unsigned long, int);
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
/* Private exported functions from psci_affinity_on.c */
Rework internal API to save non-secure entry point info This patch replaces the internal psci_save_ns_entry() API with a psci_get_ns_ep_info() API. The new function splits the work done by the previous one such that it populates and returns an 'entry_point_info_t' structure with the information to enter the normal world upon completion of the CPU_SUSPEND or CPU_ON call. This information is used to populate the non-secure context structure separately. This allows the new internal API `psci_get_ns_ep_info` to return error and enable the code to return safely. Change-Id: Ifd87430a4a3168eac0ebac712f59c93cbad1b231
2015-01-06 15:36:38 +00:00
int psci_afflvl_on(unsigned long target_cpu,
entry_point_info_t *ep,
int start_afflvl,
int end_afflvl);
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
/* Private exported functions from psci_affinity_off.c */
Remove current CPU mpidr from PSCI common code Many of the interfaces internal to PSCI pass the current CPU MPIDR_EL1 value from function to function. This is not required, and with inline access to the system registers is less efficient than requiring the code to read that register whenever required. This patch remove the mpidr parameter from the affected interfaces and reduces code in FVP BL3-1 size by 160 bytes. Change-Id: I16120a7c6944de37232016d7e109976540775602
2014-06-09 12:44:21 +01:00
int psci_afflvl_off(int, int);
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
/* Private exported functions from psci_affinity_suspend.c */
Rework internal API to save non-secure entry point info This patch replaces the internal psci_save_ns_entry() API with a psci_get_ns_ep_info() API. The new function splits the work done by the previous one such that it populates and returns an 'entry_point_info_t' structure with the information to enter the normal world upon completion of the CPU_SUSPEND or CPU_ON call. This information is used to populate the non-secure context structure separately. This allows the new internal API `psci_get_ns_ep_info` to return error and enable the code to return safely. Change-Id: Ifd87430a4a3168eac0ebac712f59c93cbad1b231
2015-01-06 15:36:38 +00:00
int psci_afflvl_suspend(entry_point_info_t *ep,
int start_afflvl,
int end_afflvl);
Remove current CPU mpidr from PSCI common code Many of the interfaces internal to PSCI pass the current CPU MPIDR_EL1 value from function to function. This is not required, and with inline access to the system registers is less efficient than requiring the code to read that register whenever required. This patch remove the mpidr parameter from the affected interfaces and reduces code in FVP BL3-1 size by 160 bytes. Change-Id: I16120a7c6944de37232016d7e109976540775602
2014-06-09 12:44:21 +01:00
unsigned int psci_afflvl_suspend_finish(int, int);
Add PSCI service specific per-CPU data This patch adds a structure defined by the PSCI service to the per-CPU data array. The structure is used to save the 'power_state' parameter specified during a 'cpu_suspend' call on the current CPU. This parameter was being saved in the cpu node in the PSCI topology tree earlier. The existing API to return the state id specified during a PSCI CPU_SUSPEND call i.e. psci_get_suspend_stateid(mpidr) has been renamed to psci_get_suspend_stateid_by_mpidr(mpidr). The new psci_get_suspend_stateid() API returns the state id of the current cpu. The psci_get_suspend_afflvl() API has been changed to return the target affinity level of the current CPU. This was specified using the 'mpidr' parameter in the old implementation. The behaviour of the get_power_on_target_afflvl() has been tweaked such that traversal of the PSCI topology tree to locate the affinity instance node for the current CPU is done only in the debug build as it is an expensive operation. Change-Id: Iaad49db75abda471f6a82d697ee6e0df554c4caf
2014-07-25 14:52:47 +01:00
void psci_set_suspend_power_state(unsigned int power_state);
Add support for handling runtime service requests This patch uses the reworked exception handling support to handle runtime service requests through SMCs following the SMC calling convention. This is a giant commit since all the changes are inter-related. It does the following: 1. Replace the old exception handling mechanism with the new one 2. Enforce that SP_EL0 is used C runtime stacks. 3. Ensures that the cold and warm boot paths use the 'cpu_context' structure to program an ERET into the next lower EL. 4. Ensures that SP_EL3 always points to the next 'cpu_context' structure prior to an ERET into the next lower EL 5. Introduces a PSCI SMC handler which completes the use of PSCI as a runtime service Change-Id: I661797f834c0803d2c674d20f504df1b04c2b852 Co-authored-by: Achin Gupta <achin.gupta@arm.com>
2014-02-06 10:36:15 +00:00
Remove coherent stack usage from the warm boot path This patch uses stacks allocated in normal memory to enable the MMU early in the warm boot path thus removing the dependency on stacks allocated in coherent memory. Necessary cache and stack maintenance is performed when a cpu is being powered down and up. This avoids any coherency issues that can arise from reading speculatively fetched stale stack memory from another CPUs cache. These changes affect the warm boot path in both BL3-1 and BL3-2. The EL3 system registers responsible for preserving the MMU state are not saved and restored any longer. Static values are used to program these system registers when a cpu is powered on or resumed from suspend. Change-Id: I8357e2eb5eb6c5f448492c5094b82b8927603784
2014-06-26 09:58:52 +01:00
/* Private exported functions from psci_helpers.S */
void psci_do_pwrdown_cache_maintenance(uint32_t affinity_level);
void psci_do_pwrup_cache_maintenance(void);
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs This patch adds support for SYSTEM_OFF and SYSTEM_RESET PSCI operations. A platform should export handlers to complete the requested operation. The FVP port exports fvp_system_off() and fvp_system_reset() as an example. If the SPD provides a power management hook for system off and system reset, then the SPD is notified about the corresponding operation so it can do some bookkeeping. The TSPD exports tspd_system_off() and tspd_system_reset() for that purpose. Versatile Express shutdown and reset methods have been removed from the FDT as new PSCI sys_poweroff and sys_reset services have been added. For those kernels that do not support yet these PSCI services (i.e. GICv3 kernel), the original dtsi files have been renamed to *-no_psci.dtsi. Fixes ARM-software/tf-issues#218 Change-Id: Ic8a3bf801db979099ab7029162af041c4e8330c8
2014-08-12 11:17:06 +01:00
/* Private exported functions from psci_system_off.c */
void __dead2 psci_system_off(void);
void __dead2 psci_system_reset(void);
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
#endif /* __PSCI_PRIVATE_H__ */