2013-10-25 09:08:21 +01:00
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/*
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2015-04-13 16:57:12 +01:00
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* Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved.
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2013-10-25 09:08:21 +01:00
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*
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2017-05-03 09:38:09 +01:00
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* SPDX-License-Identifier: BSD-3-Clause
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2013-10-25 09:08:21 +01:00
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*/
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2014-08-14 12:49:05 +01:00
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#include <aem_generic.h>
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2013-10-25 09:08:21 +01:00
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#include <arch.h>
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2014-03-18 13:46:55 +00:00
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#include <asm_macros.S>
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2014-08-14 11:33:56 +01:00
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#include <cpu_macros.S>
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2014-08-14 12:49:05 +01:00
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func aem_generic_core_pwr_dwn
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/* ---------------------------------------------
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* Disable the Data Cache.
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* ---------------------------------------------
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*/
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mrs x1, sctlr_el3
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bic x1, x1, #SCTLR_C_BIT
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msr sctlr_el3, x1
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isb
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2014-08-14 11:33:56 +01:00
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2014-08-14 12:49:05 +01:00
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mov x0, #DCCISW
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2013-10-25 09:08:21 +01:00
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2014-08-14 12:49:05 +01:00
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/* ---------------------------------------------
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* Flush L1 cache to PoU.
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* ---------------------------------------------
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*/
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b dcsw_op_louis
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2015-03-24 14:03:57 +00:00
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endfunc aem_generic_core_pwr_dwn
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2013-10-25 09:08:21 +01:00
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2014-08-14 12:49:05 +01:00
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func aem_generic_cluster_pwr_dwn
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/* ---------------------------------------------
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* Disable the Data Cache.
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* ---------------------------------------------
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*/
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mrs x1, sctlr_el3
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bic x1, x1, #SCTLR_C_BIT
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msr sctlr_el3, x1
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isb
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/* ---------------------------------------------
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* Flush L1 and L2 caches to PoC.
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* ---------------------------------------------
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*/
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mov x0, #DCCISW
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b dcsw_op_all
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2015-03-24 14:03:57 +00:00
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endfunc aem_generic_cluster_pwr_dwn
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2014-08-14 12:49:05 +01:00
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2018-09-17 04:34:35 +01:00
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#if REPORT_ERRATA
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/*
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* Errata printing function for AEM. Must follow AAPCS.
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*/
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func aem_generic_errata_report
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ret
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endfunc aem_generic_errata_report
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#endif
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2014-08-14 13:36:41 +01:00
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/* ---------------------------------------------
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* This function provides cpu specific
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* register information for crash reporting.
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* It needs to return with x6 pointing to
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* a list of register names in ascii and
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* x8 - x15 having values of registers to be
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* reported.
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* ---------------------------------------------
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*/
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2015-04-13 16:57:12 +01:00
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.section .rodata.aem_generic_regs, "aS"
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aem_generic_regs: /* The ascii list of register names to be reported */
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.asciz "" /* no registers to report */
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2014-08-14 13:36:41 +01:00
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func aem_generic_cpu_reg_dump
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2015-04-13 16:57:12 +01:00
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adr x6, aem_generic_regs
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2014-08-14 13:36:41 +01:00
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ret
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2015-03-24 14:03:57 +00:00
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endfunc aem_generic_cpu_reg_dump
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2014-08-14 13:36:41 +01:00
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2014-08-14 12:49:05 +01:00
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/* cpu_ops for Base AEM FVP */
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2016-11-18 12:58:28 +00:00
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declare_cpu_ops aem_generic, BASE_AEM_MIDR, CPU_NO_RESET_FUNC, \
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aem_generic_core_pwr_dwn, \
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aem_generic_cluster_pwr_dwn
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2013-10-25 09:08:21 +01:00
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2014-08-14 12:49:05 +01:00
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/* cpu_ops for Foundation FVP */
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2016-11-18 12:58:28 +00:00
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declare_cpu_ops aem_generic, FOUNDATION_AEM_MIDR, CPU_NO_RESET_FUNC, \
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aem_generic_core_pwr_dwn, \
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aem_generic_cluster_pwr_dwn
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