2013-10-25 09:08:21 +01:00
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/*
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2021-12-16 10:41:47 +00:00
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* Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
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2013-10-25 09:08:21 +01:00
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*
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2017-05-03 09:38:09 +01:00
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* SPDX-License-Identifier: BSD-3-Clause
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2013-10-25 09:08:21 +01:00
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*/
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2019-09-13 14:11:59 +01:00
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#include <assert.h>
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2013-10-25 09:08:21 +01:00
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#include <arch_helpers.h>
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2019-09-13 14:11:59 +01:00
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#include <arch_features.h>
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2018-12-14 00:18:21 +00:00
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#include <bl1/bl1.h>
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#include <bl2/bl2.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <drivers/auth/auth_mod.h>
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2021-12-16 10:41:47 +00:00
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#include <drivers/auth/crypto_mod.h>
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2018-12-14 00:18:21 +00:00
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#include <drivers/console.h>
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2021-06-25 23:28:59 +01:00
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#include <drivers/fwu/fwu.h>
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2019-09-13 14:11:59 +01:00
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#include <lib/extensions/pauth.h>
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2018-12-14 00:18:21 +00:00
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#include <plat/common/platform.h>
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2014-04-17 18:53:42 +01:00
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#include "bl2_private.h"
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2013-10-25 09:08:21 +01:00
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2019-07-09 22:02:43 +01:00
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#ifdef __aarch64__
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2017-10-30 14:43:43 +00:00
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#define NEXT_IMAGE "BL31"
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2019-07-09 22:02:43 +01:00
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#else
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#define NEXT_IMAGE "BL32"
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2017-10-30 14:43:43 +00:00
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#endif
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2014-06-24 14:19:36 +01:00
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2021-07-09 17:37:10 +01:00
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#if BL2_AT_EL3
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2019-01-31 10:48:47 +00:00
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/*******************************************************************************
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2021-07-09 17:37:10 +01:00
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* Setup function for BL2 when BL2_AT_EL3=1
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2019-01-31 10:48:47 +00:00
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******************************************************************************/
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2021-07-09 17:37:10 +01:00
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void bl2_el3_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
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u_register_t arg3)
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2019-01-31 10:48:47 +00:00
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{
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/* Perform early platform-specific setup */
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2021-07-09 17:37:10 +01:00
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bl2_el3_early_platform_setup(arg0, arg1, arg2, arg3);
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2019-01-31 10:48:47 +00:00
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/* Perform late platform-specific setup */
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2021-07-09 17:37:10 +01:00
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bl2_el3_plat_arch_setup();
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2019-09-13 14:11:59 +01:00
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#if CTX_INCLUDE_PAUTH_REGS
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/*
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* Assert that the ARMv8.3-PAuth registers are present or an access
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* fault will be triggered when they are being saved or restored.
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*/
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assert(is_armv8_3_pauth_present());
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#endif /* CTX_INCLUDE_PAUTH_REGS */
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2019-01-31 10:48:47 +00:00
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}
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2021-07-09 17:37:10 +01:00
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#else /* BL2_AT_EL3 */
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2019-01-31 17:40:44 +00:00
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/*******************************************************************************
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2021-07-09 17:37:10 +01:00
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* Setup function for BL2 when BL2_AT_EL3=0
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2019-01-31 17:40:44 +00:00
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******************************************************************************/
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2021-07-09 17:37:10 +01:00
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void bl2_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
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u_register_t arg3)
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2019-01-31 17:40:44 +00:00
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{
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/* Perform early platform-specific setup */
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2021-07-09 17:37:10 +01:00
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bl2_early_platform_setup2(arg0, arg1, arg2, arg3);
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2019-01-31 17:40:44 +00:00
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/* Perform late platform-specific setup */
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2021-07-09 17:37:10 +01:00
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bl2_plat_arch_setup();
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2019-09-13 14:11:59 +01:00
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#if CTX_INCLUDE_PAUTH_REGS
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/*
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* Assert that the ARMv8.3-PAuth registers are present or an access
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* fault will be triggered when they are being saved or restored.
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*/
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assert(is_armv8_3_pauth_present());
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#endif /* CTX_INCLUDE_PAUTH_REGS */
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2019-01-31 17:40:44 +00:00
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}
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#endif /* BL2_AT_EL3 */
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2014-06-24 14:19:36 +01:00
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/*******************************************************************************
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* The only thing to do in BL2 is to load further images and pass control to
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2016-09-12 16:10:33 +01:00
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* next BL. The memory occupied by BL2 will be reclaimed by BL3x stages. BL2
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* runs entirely in S-EL1.
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2014-06-24 14:19:36 +01:00
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******************************************************************************/
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void bl2_main(void)
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{
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2016-09-12 16:10:33 +01:00
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entry_point_info_t *next_bl_ep_info;
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2014-06-24 14:19:36 +01:00
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2014-07-29 17:14:00 +01:00
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NOTICE("BL2: %s\n", version_string);
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NOTICE("BL2: %s\n", build_message);
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2014-06-24 14:19:36 +01:00
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/* Perform remaining generic architectural setup in S-EL1 */
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bl2_arch_setup();
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2021-06-25 23:28:59 +01:00
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#if PSA_FWU_SUPPORT
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fwu_init();
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#endif /* PSA_FWU_SUPPORT */
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2021-12-16 10:41:47 +00:00
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crypto_mod_init();
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2015-01-28 16:46:57 +00:00
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/* Initialize authentication module */
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2015-05-19 11:54:12 +01:00
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auth_mod_init();
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2015-01-28 16:46:57 +00:00
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2021-08-06 09:26:20 +01:00
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/* Initialize the Measured Boot backend */
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bl2_plat_mboot_init();
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2020-07-13 14:06:47 +01:00
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/* Initialize boot source */
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2017-09-26 12:53:01 +01:00
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bl2_plat_preload_setup();
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2016-09-12 16:10:33 +01:00
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/* Load the subsequent bootloader images. */
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next_bl_ep_info = bl2_load_images();
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2014-05-28 22:22:55 +01:00
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2021-08-06 09:26:20 +01:00
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/* Teardown the Measured Boot backend */
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bl2_plat_mboot_finish();
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2020-07-13 14:06:47 +01:00
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2021-07-09 17:37:10 +01:00
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#if !BL2_AT_EL3 && !ENABLE_RME
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2019-07-09 22:02:43 +01:00
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#ifndef __aarch64__
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2016-06-30 14:52:12 +01:00
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/*
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* For AArch32 state BL1 and BL2 share the MMU setup.
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* Given that BL2 does not map BL1 regions, MMU needs
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* to be disabled in order to go back to BL1.
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*/
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disable_mmu_icache_secure();
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2019-07-09 22:02:43 +01:00
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#endif /* !__aarch64__ */
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2016-06-30 14:52:12 +01:00
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2017-02-16 16:17:19 +00:00
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console_flush();
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2019-09-13 14:11:59 +01:00
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#if ENABLE_PAUTH
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/*
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* Disable pointer authentication before running next boot image
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*/
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pauth_disable_el1();
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#endif /* ENABLE_PAUTH */
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2013-10-25 09:08:21 +01:00
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/*
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2016-09-12 16:10:33 +01:00
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* Run next BL image via an SMC to BL1. Information on how to pass
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* control to the BL32 (if present) and BL33 software images will
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* be passed to next BL image as an argument.
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2013-10-25 09:08:21 +01:00
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*/
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2016-09-12 16:10:33 +01:00
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smc(BL1_SMC_RUN_IMAGE, (unsigned long)next_bl_ep_info, 0, 0, 0, 0, 0, 0);
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2021-07-09 17:37:10 +01:00
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#else /* if BL2_AT_EL3 || ENABLE_RME */
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2017-10-30 14:43:43 +00:00
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NOTICE("BL2: Booting " NEXT_IMAGE "\n");
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print_entry_point_info(next_bl_ep_info);
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console_flush();
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2019-09-13 14:11:59 +01:00
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#if ENABLE_PAUTH
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/*
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* Disable pointer authentication before running next boot image
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*/
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pauth_disable_el3();
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#endif /* ENABLE_PAUTH */
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2017-10-30 14:43:43 +00:00
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bl2_run_next_image(next_bl_ep_info);
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2021-07-09 17:37:10 +01:00
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#endif /* BL2_AT_EL3 && ENABLE_RME */
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2013-10-25 09:08:21 +01:00
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}
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