2016-11-14 12:01:04 +00:00
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/*
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2017-06-14 14:47:36 +01:00
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* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
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2016-11-14 12:01:04 +00:00
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*
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2017-05-03 09:38:09 +01:00
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* SPDX-License-Identifier: BSD-3-Clause
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2016-11-14 12:01:04 +00:00
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*/
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#include <assert.h>
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2018-12-14 00:18:21 +00:00
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#include <common/bl_common.h>
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#include <common/desc_image_load.h>
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2019-01-25 14:30:04 +00:00
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#include <plat/arm/common/plat_arm.h>
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2016-11-14 12:01:04 +00:00
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#if JUNO_AARCH32_EL3_RUNTIME
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/*******************************************************************************
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* This function changes the spsr for BL32 image to bypass
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* the check in BL1 AArch64 exception handler. This is needed in the aarch32
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* boot flow as the core comes up in aarch64 and to enter the BL32 image a warm
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* reset in aarch32 state is required.
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******************************************************************************/
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2018-06-27 16:45:48 +01:00
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int arm_bl2_plat_handle_post_image_load(unsigned int image_id)
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2016-11-14 12:01:04 +00:00
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{
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int err = arm_bl2_handle_post_image_load(image_id);
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if (!err && (image_id == BL32_IMAGE_ID)) {
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bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id);
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assert(bl_mem_params);
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bl_mem_params->ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
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DISABLE_ALL_EXCEPTIONS);
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}
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return err;
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}
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#endif /* JUNO_AARCH32_EL3_RUNTIME */
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