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juno/aarch32: Restore `SCP_BOOT_CFG_ADDR` to the cold boot value 

Before BL2 loads the SCP ram firmware, `SCP_BOOT_CFG_ADDR` specifies
the primary core.  After the SCP ram firmware has started executing,
`SCP_BOOT_CFG_ADDR` is modified.  This is not normally an issue but
the Juno AArch32 boot flow is a special case.  BL1 does a warm reset
into AArch32 and the core jumps to the `sp_min` entrypoint.  This is
effectively a `RESET_TO_SP_MIN` configuration.  `sp_min` has to be
able to determine the primary core and hence we need to restore
`SCP_BOOT_CFG_ADDR` to the cold boot value before `sp_min` runs.

This magically worked when booting on A53 because the core index was
zero and it just so happened to match with the new value in
`SCP_BOOT_CFG_ADDR`.

Change-Id: I105425c680cf6238948625c1d1017b01d3517c01
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
This commit is contained in:
Dimitris Papastamos 2017-06-14 14:47:36 +01:00
parent ccf3911108
commit cc47e1ada6
1 changed files with 25 additions and 1 deletions
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26
plat/arm/board/juno/juno_bl2_setup.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -29,4 +29,28 @@ int bl2_plat_handle_post_image_load(unsigned int image_id)
return err;
}
/*
* We need to override some of the platform functions when booting SP_MIN
* on Juno AArch32.
*/
static unsigned int scp_boot_config;
void bl2_early_platform_setup(meminfo_t *mem_layout)
{
arm_bl2_early_platform_setup(mem_layout);
/* Save SCP Boot config before it gets overwritten by SCP_BL2 loading */
VERBOSE("BL2: Saving SCP Boot config = 0x%x\n", scp_boot_config);
scp_boot_config = mmio_read_32(SCP_BOOT_CFG_ADDR);
}
void bl2_platform_setup(void)
{
arm_bl2_platform_setup();
mmio_write_32(SCP_BOOT_CFG_ADDR, scp_boot_config);
VERBOSE("BL2: Restored SCP Boot config = 0x%x\n", scp_boot_config);
}
#endif /* JUNO_AARCH32_EL3_RUNTIME */