plat/sgi: define memory regions for multi-chip platforms
For multi-chip platforms, add a macro to define the memory regions on chip numbers >1 and its associated access permissions. These memory regions are marked with non-secure access. Signed-off-by: Aditya Angadi <aditya.angadi@arm.com> Change-Id: If3d6180fd8ea61f45147c39d3140d694abf06617
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@ -226,4 +226,17 @@
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/* Number of SCMI channels on the platform */
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#define PLAT_ARM_SCMI_CHANNEL_COUNT CSS_SGI_CHIP_COUNT
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/*
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* Mapping definition of the TrustZone Controller for ARM SGI/RD platforms
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* where both the DRAM regions are marked for non-secure access. This applies
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* to multi-chip platforms.
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*/
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#define SGI_PLAT_TZC_NS_REMOTE_REGIONS_DEF(n) \
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{CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n) + ARM_DRAM1_BASE, \
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CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n) + ARM_DRAM1_END, \
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ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS}, \
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{CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n) + ARM_DRAM2_BASE, \
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CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n) + ARM_DRAM2_END, \
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ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS}
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#endif /* SGI_BASE_PLATFORM_DEF_H */
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