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refactor(gicv3): rename GIC Clayton to GIC-700 

The GIC IP formerly known as "GIC Clayton" has been released under the
name of "GIC-700".

Rename occurences of Clayton in comments and macro names to reflect the
official name.

Change-Id: Ie8c55f7da7753127d58c8382b0033c1b486f7909
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Andre Przywara 2021-07-20 19:20:07 +01:00
parent 9fcefe38d5
commit 0c9f91cf69
4 changed files with 8 additions and 8 deletions
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8
drivers/arm/gic/v3/gic-x00.c
View File

@ -24,7 +24,7 @@
#define GICR_PWRR 0x24U #define GICR_PWRR 0x24U
#define IIDR_MODEL_ARM_GIC_600 U(0x0200043b) #define IIDR_MODEL_ARM_GIC_600 U(0x0200043b)
#define IIDR_MODEL_ARM_GIC_600AE U(0x0300043b) #define IIDR_MODEL_ARM_GIC_600AE U(0x0300043b)
#define IIDR_MODEL_ARM_GIC_CLAYTON U(0x0400043b) #define IIDR_MODEL_ARM_GIC_700 U(0x0400043b)
/* GICR_PWRR fields */ /* GICR_PWRR fields */
#define PWRR_RDPD_SHIFT 0 #define PWRR_RDPD_SHIFT 0
@ -46,7 +46,7 @@
#if GICV3_SUPPORT_GIC600 #if GICV3_SUPPORT_GIC600
/* GIC-600/Clayton specific accessor functions */ /* GIC-600/700 specific accessor functions */
static void gicr_write_pwrr(uintptr_t base, unsigned int val) static void gicr_write_pwrr(uintptr_t base, unsigned int val)
{ {
mmio_write_32(base + GICR_PWRR, val); mmio_write_32(base + GICR_PWRR, val);
@ -123,12 +123,12 @@ static bool gicv3_redists_need_power_mgmt(uintptr_t gicr_base)
uint32_t reg = mmio_read_32(gicr_base + GICR_IIDR); uint32_t reg = mmio_read_32(gicr_base + GICR_IIDR);
/* /*
* The Arm GIC-600 and GIC-Clayton models have their redistributors * The Arm GIC-600 and GIC-700 models have their redistributors
* powered down at reset. * powered down at reset.
*/ */
return (((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600) || return (((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600) ||
((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600AE) || ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600AE) ||
((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_CLAYTON)); ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_700));
} }
#endif /* GICV3_SUPPORT_GIC600 */ #endif /* GICV3_SUPPORT_GIC600 */

4
drivers/arm/gic/v3/gic600_multichip_private.h
View File

@ -28,8 +28,8 @@
#define GICD_DCHIPR_RT_OWNER_SHIFT 4 #define GICD_DCHIPR_RT_OWNER_SHIFT 4
/* /*
* If GIC v4 extension is enabled, then use SPI macros specific to GIC-Clayton. * If GIC v4 extension is enabled, then use SPI macros specific to GIC-700.
* Other shifts and mask remains same between GIC-600 and GIC-Clayton. * Other shifts and mask remains same between GIC-600 and GIC-700.
*/ */
#if GIC_ENABLE_V4_EXTN #if GIC_ENABLE_V4_EXTN
#define GICD_CHIPRx_SPI_BLOCK_MIN_SHIFT 9 #define GICD_CHIPRx_SPI_BLOCK_MIN_SHIFT 9

2
plat/arm/board/rdn2/platform.mk
View File

@ -3,7 +3,7 @@
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# #
# RD-N2 platform uses GIC-Clayton which is based on GICv4.1 # RD-N2 platform uses GIC-700 which is based on GICv4.1
GIC_ENABLE_V4_EXTN := 1 GIC_ENABLE_V4_EXTN := 1
include plat/arm/css/sgi/sgi-common.mk include plat/arm/css/sgi/sgi-common.mk

2
plat/arm/board/rdv1/platform.mk
View File

@ -3,7 +3,7 @@
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# #
# RD-V1 platform uses GIC-Clayton which is based on GICv4.1 # RD-V1 platform uses GIC-700 which is based on GICv4.1
GIC_ENABLE_V4_EXTN := 1 GIC_ENABLE_V4_EXTN := 1
include plat/arm/css/sgi/sgi-common.mk include plat/arm/css/sgi/sgi-common.mk