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marvell: uart: a3720: Increase TX FIFO EMPTY timeout from 2ms to 3ms 

TX FIFO has space for 32 characters. With default UART baudrate 115200 it
takes more than 2ms to transmit all 32 characters, so wait at least 3ms
before flushing TX FIFO.

If WTMI firmware transmitted something via UART before TF-A was booted,
some characters may still wait in TX FIFO when TF-A is initializing UART
driver. So wait at least 3ms to ensure that HW has enough time to transmit
all characters waiting in TX FIFO.

This fixes an issue where sometimes characters transmitted on UART by our
custom WTMI image are lost.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I8ea4ea58e4ba3e0c0d7f47e679171b9b94442f19
This commit is contained in:
Pali Rohár 2021-02-16 11:56:24 +01:00
parent 98641515a4
commit 0d06b058a5
1 changed files with 2 additions and 2 deletions
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4
drivers/marvell/uart/a3700_console.S
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@ -60,10 +60,10 @@ func console_a3700_core_init
str w3, [x0, #UART_POSSR_REG]
/*
* Wait for the TX (THR and TSR) to be empty. If wait for 2ms, the TX FIFO is
* Wait for the TX (THR and TSR) to be empty. If wait for 3ms, the TX FIFO is
* still not empty, TX FIFO will reset by all means.
*/
mov w1, #20 /* max time out 20 * 100 us */
mov w1, #30 /* max time out 30 * 100 us */
2:
/* Check whether TX (THR and TSR) is empty */
ldr w3, [x0, #UART_STATUS_REG]