plat/arm/common: add an additional platform power level

For platforms using multi-threaded CPUs, there can be upto four
platform power domain levels. At present, there are three platform
power domain levels that are defined for the CSS platforms. Define a
fourth level 'ARM_PWR_LVL3' as well to provide support for an
additional platform power domain level.

Change-Id: I40cc17a10f4690a560776f504364fd7277a7e72a
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
This commit is contained in:
Chandni Cherukuri 2018-10-16 14:42:19 +05:30
parent eff2f44430
commit 0e27faf484
1 changed files with 1 additions and 0 deletions

View File

@ -34,6 +34,7 @@
#define ARM_PWR_LVL0 MPIDR_AFFLVL0
#define ARM_PWR_LVL1 MPIDR_AFFLVL1
#define ARM_PWR_LVL2 MPIDR_AFFLVL2
#define ARM_PWR_LVL3 MPIDR_AFFLVL3
/*
* Macros for local power states in ARM platforms encoded by State-ID field