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Adding new optional PSCI hook pwr_domain_on_finish_late 

This PSCI hook is similar to pwr_domain_on_finish but is
guaranteed to be invoked with the respective core and cluster are
participating in coherency. This will be necessary to safely invoke
the new GICv3 API which modifies shared GIC data structures concurrently.

Change-Id: I8e54f05c9d4ef5712184c9c18ba45ac97a29eb7a
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
This commit is contained in:
Madhukar Pappireddy 2019-08-12 18:31:33 -05:00
parent ec834925f3
commit 1010770719
3 changed files with 25 additions and 2 deletions
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13
docs/getting_started/porting-guide.rst
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@ -2202,6 +2202,19 @@ immediately before the CPU was turned on. It indicates which power domains
above the CPU might require initialization due to having previously been in above the CPU might require initialization due to having previously been in
low power states. The generic code expects the handler to succeed. low power states. The generic code expects the handler to succeed.
plat_psci_ops.pwr_domain_on_finish_late() [optional]
...........................................................
This optional function is called by the PSCI implementation after the calling
CPU is fully powered on with respective data caches enabled. The calling CPU and
the associated cluster are guaranteed to be participating in coherency. This
function gives the flexibility to perform any platform-specific actions safely,
such as initialization or modification of shared data structures, without the
overhead of explicit cache maintainace operations.
The ``target_state`` has a similar meaning as described in the ``pwr_domain_on_finish()``
operation. The generic code expects the handler to succeed.
plat_psci_ops.pwr_domain_suspend_finish() plat_psci_ops.pwr_domain_suspend_finish()
......................................... .........................................

4
include/lib/psci/psci.h
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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -301,6 +301,8 @@ typedef struct plat_psci_ops {
const psci_power_state_t *target_state); const psci_power_state_t *target_state);
void (*pwr_domain_suspend)(const psci_power_state_t *target_state); void (*pwr_domain_suspend)(const psci_power_state_t *target_state);
void (*pwr_domain_on_finish)(const psci_power_state_t *target_state); void (*pwr_domain_on_finish)(const psci_power_state_t *target_state);
void (*pwr_domain_on_finish_late)(
const psci_power_state_t *target_state);
void (*pwr_domain_suspend_finish)( void (*pwr_domain_suspend_finish)(
const psci_power_state_t *target_state); const psci_power_state_t *target_state);
void __dead2 (*pwr_domain_pwr_down_wfi)( void __dead2 (*pwr_domain_pwr_down_wfi)(

10
lib/psci/psci_on.c
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -181,6 +181,14 @@ void psci_cpu_on_finish(int cpu_idx, const psci_power_state_t *state_info)
psci_do_pwrup_cache_maintenance(); psci_do_pwrup_cache_maintenance();
#endif #endif
/*
* Plat. management: Perform any platform specific actions which
* can only be done with the cpu and the cluster guaranteed to
* be coherent.
*/
if (psci_plat_pm_ops->pwr_domain_on_finish_late != NULL)
psci_plat_pm_ops->pwr_domain_on_finish_late(state_info);
/* /*
* All the platform specific actions for turning this cpu * All the platform specific actions for turning this cpu
* on have completed. Perform enough arch.initialization * on have completed. Perform enough arch.initialization