Merge changes Ie5c48303,I5d363c46 into integration

* changes:
  tzc400: adjust filter flag if it is set to FILTER_BIT_ALL
  tzc400: fix logical error in FILTER_BIT definitions
This commit is contained in:
Madhukar Pappireddy 2021-02-22 21:44:01 +00:00 committed by TrustedFirmware Code Review
commit 1272391ee1
2 changed files with 12 additions and 8 deletions

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -162,7 +162,9 @@ void tzc400_configure_region0(unsigned int sec_attr,
/*
* `tzc400_configure_region` is used to program regions into the TrustZone
* controller. A region can be associated with more than one filter. The
* associated filters are passed in as a bitmap (bit0 = filter0).
* associated filters are passed in as a bitmap (bit0 = filter0), except that
* the value TZC_400_REGION_ATTR_FILTER_BIT_ALL selects all filters, based on
* the value of tzc400.num_filters.
* NOTE:
* Region 0 is special; it is preferable to use tzc400_configure_region0
* for this region (see comment for that function).
@ -176,6 +178,11 @@ void tzc400_configure_region(unsigned int filters,
{
assert(tzc400.base != 0U);
/* Adjust filter mask by real filter number */
if (filters == TZC_400_REGION_ATTR_FILTER_BIT_ALL) {
filters = (1U << tzc400.num_filters) - 1U;
}
/* Do range checks on filters and regions. */
assert(((filters >> tzc400.num_filters) == 0U) &&
(region < tzc400.num_regions));

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -80,11 +80,8 @@
/* Filter enable bits in a TZC */
#define TZC_400_REGION_ATTR_F_EN_MASK U(0xf)
#define TZC_400_REGION_ATTR_FILTER_BIT(x) \
((U(1) << (x)) << TZC_REGION_ATTR_F_EN_SHIFT)
#define TZC_400_REGION_ATTR_FILTER_BIT_ALL \
(TZC_400_REGION_ATTR_F_EN_MASK << \
TZC_REGION_ATTR_F_EN_SHIFT)
#define TZC_400_REGION_ATTR_FILTER_BIT(x) (U(1) << (x))
#define TZC_400_REGION_ATTR_FILTER_BIT_ALL TZC_400_REGION_ATTR_F_EN_MASK
/*
* All TZC region configuration registers are placed one after another. It