Tegra194: add memory barriers during DRAM to SysRAM copy
This patch adds memory barriers to the trampoline code copying TZDRAM contents to SysRAM during exit from System Suspend. These barriers make sure that all the copies go through before we start executing in SysRAM. Reported by: Nathan Tuck <ntuck@nvidia.com> Change-Id: I3fd2964086b6c0e044cc4165051a4801440db9cd Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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@ -58,6 +58,13 @@ m_loop1:
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subs x2, x2, #1
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subs x2, x2, #1
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b.ne m_loop1
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b.ne m_loop1
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/*
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* Synchronization barriers to make sure that memory is flushed out
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* before we start execution in SysRAM.
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*/
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dsb sy
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isb
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boot_cpu:
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boot_cpu:
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adr x0, __tegra194_cpu_reset_handler_data
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adr x0, __tegra194_cpu_reset_handler_data
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ldr x0, [x0]
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ldr x0, [x0]
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