Add build configuration for timer save/restore
At present, non-secure timer register contents are saved and restored as part of world switch by BL3-1. This effectively means that the non-secure timer stops, and non-secure timer interrupts are prevented from asserting until BL3-1 switches back, introducing latency for non-secure services. Often, secure world might depend on alternate sources for secure interrupts (secure timer or platform timer) instead of non-secure timers, in which case this save and restore is unnecessary. This patch introduces a boolean build-time configuration NS_TIMER_SWITCH to choose whether or not to save and restore non-secure timer registers upon world switch. The default choice is made not to save and restore them. Fixes ARM-software/tf-issues#148 Change-Id: I1b9d623606acb9797c3e0b02fb5ec7c0a414f37e
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6
Makefile
6
Makefile
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@ -45,6 +45,8 @@ PLAT := ${DEFAULT_PLAT}
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SPD := none
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SPD := none
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# Base commit to perform code check on
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# Base commit to perform code check on
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BASE_COMMIT := origin/master
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BASE_COMMIT := origin/master
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# NS timer register save and restore
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NS_TIMER_SWITCH := 0
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# Checkpatch ignores
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# Checkpatch ignores
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@ -171,6 +173,10 @@ CFLAGS += -g
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ASFLAGS += -g -Wa,--gdwarf-2
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ASFLAGS += -g -Wa,--gdwarf-2
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endif
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endif
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# Process NS_TIMER_SWITCH flag
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$(eval $(call assert_boolean,NS_TIMER_SWITCH))
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$(eval $(call add_define,NS_TIMER_SWITCH))
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ASFLAGS += -nostdinc -ffreestanding -Wa,--fatal-warnings \
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ASFLAGS += -nostdinc -ffreestanding -Wa,--fatal-warnings \
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-mgeneral-regs-only -D__ASSEMBLY__ \
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-mgeneral-regs-only -D__ASSEMBLY__ \
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${DEFINES} ${INCLUDES}
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${DEFINES} ${INCLUDES}
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@ -172,6 +172,8 @@ func el1_sysregs_context_save
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mrs x9, vbar_el1
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mrs x9, vbar_el1
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stp x17, x9, [x0, #CTX_CONTEXTIDR_EL1]
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stp x17, x9, [x0, #CTX_CONTEXTIDR_EL1]
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/* Save NS timer registers if the build has instructed so */
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#if NS_TIMER_SWITCH
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mrs x10, cntp_ctl_el0
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mrs x10, cntp_ctl_el0
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mrs x11, cntp_cval_el0
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mrs x11, cntp_cval_el0
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stp x10, x11, [x0, #CTX_CNTP_CTL_EL0]
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stp x10, x11, [x0, #CTX_CNTP_CTL_EL0]
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@ -181,8 +183,11 @@ func el1_sysregs_context_save
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stp x12, x13, [x0, #CTX_CNTV_CTL_EL0]
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stp x12, x13, [x0, #CTX_CNTV_CTL_EL0]
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mrs x14, cntkctl_el1
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mrs x14, cntkctl_el1
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str x14, [x0, #CTX_CNTKCTL_EL1]
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#endif
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mrs x15, fpexc32_el2
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mrs x15, fpexc32_el2
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stp x14, x15, [x0, #CTX_CNTKCTL_EL1]
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str x15, [x0, #CTX_FP_FPEXC32_EL2]
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ret
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ret
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@ -253,6 +258,8 @@ func el1_sysregs_context_restore
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msr contextidr_el1, x17
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msr contextidr_el1, x17
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msr vbar_el1, x9
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msr vbar_el1, x9
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/* Restore NS timer registers if the build has instructed so */
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#if NS_TIMER_SWITCH
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ldp x10, x11, [x0, #CTX_CNTP_CTL_EL0]
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ldp x10, x11, [x0, #CTX_CNTP_CTL_EL0]
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msr cntp_ctl_el0, x10
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msr cntp_ctl_el0, x10
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msr cntp_cval_el0, x11
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msr cntp_cval_el0, x11
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@ -261,8 +268,11 @@ func el1_sysregs_context_restore
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msr cntv_ctl_el0, x12
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msr cntv_ctl_el0, x12
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msr cntv_cval_el0, x13
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msr cntv_cval_el0, x13
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ldp x14, x15, [x0, #CTX_CNTKCTL_EL1]
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ldr x14, [x0, #CTX_CNTKCTL_EL1]
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msr cntkctl_el1, x14
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msr cntkctl_el1, x14
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#endif
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ldr x15, [x0, #CTX_FP_FPEXC32_EL2]
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msr fpexc32_el2, x15
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msr fpexc32_el2, x15
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/* No explict ISB required here as ERET covers it */
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/* No explict ISB required here as ERET covers it */
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@ -141,6 +141,11 @@ performed.
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* `DEBUG`: Chooses between a debug and release build. It can take either 0
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* `DEBUG`: Chooses between a debug and release build. It can take either 0
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(release) or 1 (debug) as values. 0 is the default
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(release) or 1 (debug) as values. 0 is the default
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* `NS_TIMER_SWITCH`: Enable save and restore for non-secure timer register
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contents upon world switch. It can take either 0 (don't save and restore) or
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1 (do save and restore). 0 is the default. An SPD could set this to 1 if it
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wants the timer registers to be saved and restored
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* `PLAT`: Choose a platform to build ARM Trusted Firmware for. The chosen
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* `PLAT`: Choose a platform to build ARM Trusted Firmware for. The chosen
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platform name must be the name of one of the directories under the `plat/`
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platform name must be the name of one of the directories under the `plat/`
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directory other than `common`
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directory other than `common`
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@ -127,6 +127,11 @@
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#define CTX_AFSR1_EL1 0xc8
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#define CTX_AFSR1_EL1 0xc8
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#define CTX_CONTEXTIDR_EL1 0xd0
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#define CTX_CONTEXTIDR_EL1 0xd0
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#define CTX_VBAR_EL1 0xd8
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#define CTX_VBAR_EL1 0xd8
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/*
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* If the timer registers aren't saved and restored, we don't have to reserve
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* space for them in the context
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*/
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#if NS_TIMER_SWITCH
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#define CTX_CNTP_CTL_EL0 0xe0
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#define CTX_CNTP_CTL_EL0 0xe0
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#define CTX_CNTP_CVAL_EL0 0xe8
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#define CTX_CNTP_CVAL_EL0 0xe8
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#define CTX_CNTV_CTL_EL0 0xf0
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#define CTX_CNTV_CTL_EL0 0xf0
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@ -134,6 +139,10 @@
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#define CTX_CNTKCTL_EL1 0x100
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#define CTX_CNTKCTL_EL1 0x100
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#define CTX_FP_FPEXC32_EL2 0x108
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#define CTX_FP_FPEXC32_EL2 0x108
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#define CTX_SYSREGS_END 0x110
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#define CTX_SYSREGS_END 0x110
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#else
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#define CTX_FP_FPEXC32_EL2 0xe0
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#define CTX_SYSREGS_END 0xf0
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#endif
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/*******************************************************************************
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/*******************************************************************************
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* Constants that allow assembler code to access members of and the 'fp_regs'
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* Constants that allow assembler code to access members of and the 'fp_regs'
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