plat: tc0: OP-TEE as S-EL1 SP with SPMC at S-EL2
This patch adds support to enable OP-TEE as S-EL1 SP with SPMC at S-EL2 - create SPMC manifest file with OP-TEE as SP - add support for ARM_SPMC_MANIFEST_DTS build option - add optee entry with ffa as method in tc0.dts Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Change-Id: Ia9b5c22c6f605d3886914bbac8ac45e8365671cb
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fdts/tc0.dts
13
fdts/tc0.dts
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@ -370,4 +370,17 @@
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};
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};
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};
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};
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};
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};
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ffa {
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compatible = "arm,ffa";
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conduit = "smc";
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mem_share_buffer = "tx";
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};
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firmware {
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optee {
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compatible = "linaro,optee-tz";
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method = "ffa";
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};
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};
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};
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};
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@ -0,0 +1,78 @@
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/*
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* Copyright (c) 2020, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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#define AFF 00
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#include "fvp-defs.dtsi"
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#undef POST
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#define POST \
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};
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/ {
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compatible = "arm,ffa-core-manifest-1.0";
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#address-cells = <2>;
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#size-cells = <1>;
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attribute {
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spmc_id = <0x8000>;
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maj_ver = <0x1>;
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min_ver = <0x0>;
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exec_state = <0x0>;
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load_address = <0x0 0xfd000000>;
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entrypoint = <0x0 0xfd000000>;
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binary_size = <0x80000>;
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};
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/*
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* temporary: This entry is added based on v2.4 hafnium and will be
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* removed when rebased to upstream master.
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*/
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chosen {
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linux,initrd-start = <0>;
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linux,initrd-end = <0>;
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};
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hypervisor {
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compatible = "hafnium,hafnium";
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vm1 {
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is_ffa_partition;
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debug_name = "op-tee";
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load_address = <0xfd280000>;
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};
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};
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cpus {
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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CPU_0
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/*
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* SPMC (Hafnium) requires secondary core nodes are declared
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* in descending order.
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*/
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CPU_3
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CPU_2
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CPU_1
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};
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/*
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* temporary: This device-memory region is added based on v2.4 hafnium
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* and will be removed when rebased to upstream master. As first
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* Secure Partition no longer maps device memory.
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*/
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device-memory@21000000 {
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device_type = "device-memory";
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reg = <0x0 0x21000000 0x5f000000>;
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};
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/* 32MB of TC0_TZC_DRAM1_BASE */
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memory@fd000000 {
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device_type = "memory";
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reg = <0x0 0xfd000000 0x2000000>;
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};
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};
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@ -27,6 +27,12 @@
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secure-partitions {
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secure-partitions {
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compatible = "arm,sp";
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compatible = "arm,sp";
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#if OPTEE_SP_FW_CONFIG
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op-tee {
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uuid = <0x486178e0 0xe7f811e3 0xbc5e0002 0xa5d5c51b>;
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load-address = <0xfd280000>;
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};
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#else
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cactus-primary {
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cactus-primary {
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uuid = <0xb4b5671e 0x4a904fe1 0xb81ffb13 0xdae1dacb>;
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uuid = <0xb4b5671e 0x4a904fe1 0xb81ffb13 0xdae1dacb>;
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load-address = <0xfe000000>;
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load-address = <0xfe000000>;
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@ -43,5 +49,6 @@
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uuid = <0x79b55c73 0x1d8c44b9 0x859361e1 0x770ad8d2>;
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uuid = <0x79b55c73 0x1d8c44b9 0x859361e1 0x770ad8d2>;
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load-address = <0xfe200000>;
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load-address = <0xfe200000>;
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};
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};
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#endif
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};
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};
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};
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};
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@ -112,7 +112,7 @@
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* little space for growth.
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* little space for growth.
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*/
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*/
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#if TRUSTED_BOARD_BOOT
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#if TRUSTED_BOARD_BOOT
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# define PLAT_ARM_MAX_BL2_SIZE 0x1E000
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# define PLAT_ARM_MAX_BL2_SIZE 0x20000
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#else
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#else
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# define PLAT_ARM_MAX_BL2_SIZE 0x14000
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# define PLAT_ARM_MAX_BL2_SIZE 0x14000
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#endif
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#endif
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@ -86,8 +86,12 @@ $(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
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$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
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$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
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ifeq (${SPD},spmd)
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ifeq (${SPD},spmd)
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FDT_SOURCES += ${TC0_BASE}/fdts/${PLAT}_spmc_manifest.dts
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ifeq ($(ARM_SPMC_MANIFEST_DTS),)
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TC0_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_spmc_manifest.dtb
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ARM_SPMC_MANIFEST_DTS := ${TC0_BASE}/fdts/${PLAT}_spmc_manifest.dts
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endif
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FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
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TC0_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
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# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
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# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${TC0_TOS_FW_CONFIG},--tos-fw-config,${TC0_TOS_FW_CONFIG}))
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$(eval $(call TOOL_ADD_PAYLOAD,${TC0_TOS_FW_CONFIG},--tos-fw-config,${TC0_TOS_FW_CONFIG}))
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