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refactor(allwinner): patch the DTB after setting up PSCI 

Idle states are advertised to the rich OS by declaring them in the DTB.
Since the availability of idle states depends on which PSCI
implementation was chosen, the DTB must be updated after PSCI setup.

Move this operation to bl31_plat_runtime_setup, the platform hook
which happens at the right time. Defining this hook overrides the weak
definition from plat/common, so copy over the code from there, too.

Change-Id: I42a83edb9cb28e1803d17dc2d73dbc879d885222
Signed-off-by: Samuel Holland <samuel@sholland.org>
This commit is contained in:
Samuel Holland 2022-01-22 22:06:57 -06:00 committed by Joanna Farley
parent 6fa8e72e7b
commit 3ccccc6580
1 changed files with 17 additions and 13 deletions
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30
plat/allwinner/common/sunxi_bl31_setup.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -32,6 +32,8 @@ static entry_point_info_t bl33_image_ep_info;
static console_t console;
static void *fdt;
static const gicv2_driver_data_t sunxi_gic_data = {
.gicd_base = SUNXI_GICD_BASE,
.gicc_base = SUNXI_GICC_BASE,
@ -49,7 +51,7 @@ static const gicv2_driver_data_t sunxi_gic_data = {
* entry point to find the load address, which should be followed by the
* size. Adding those together gives us the address of the DTB.
*/
static void *sunxi_find_dtb(void)
static void sunxi_find_dtb(void)
{
uint64_t *u_boot_base;
int i;
@ -57,7 +59,7 @@ static void *sunxi_find_dtb(void)
u_boot_base = (void *)SUNXI_BL33_VIRT_BASE;
for (i = 0; i < 2048 / sizeof(uint64_t); i++) {
uint32_t *dtb_base;
void *dtb_base;
if (u_boot_base[i] != PRELOADED_BL33_BASE)
continue;
@ -67,15 +69,13 @@ static void *sunxi_find_dtb(void)
continue;
/* end of the image: base address + size */
dtb_base = (void *)((char *)u_boot_base + u_boot_base[i + 1]);
dtb_base = (char *)u_boot_base + u_boot_base[i + 1];
if (fdt_check_header(dtb_base) != 0)
continue;
return dtb_base;
if (fdt_check_header(dtb_base) == 0) {
fdt = dtb_base;
return;
}
}
return NULL;
}
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
@ -113,7 +113,6 @@ void bl31_platform_setup(void)
{
const char *soc_name;
uint16_t soc_id = sunxi_read_soc_id();
void *fdt;
switch (soc_id) {
case SUNXI_SOC_A64:
@ -139,7 +138,7 @@ void bl31_platform_setup(void)
generic_delay_timer_init();
fdt = sunxi_find_dtb();
sunxi_find_dtb();
if (fdt) {
const char *model;
int length;
@ -180,10 +179,15 @@ void bl31_platform_setup(void)
sunxi_pmic_setup(soc_id, fdt);
INFO("BL31: Platform setup done\n");
}
void bl31_plat_runtime_setup(void)
{
/* Change the DTB if the configuration requires so. */
sunxi_prepare_dtb(fdt);
INFO("BL31: Platform setup done\n");
console_switch_state(CONSOLE_FLAG_RUNTIME);
}
entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)