andrius
/
arm-trusted-firmware
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

feat(nxp/common/errata): add SoC erratum a008850 

Add SoC erratum a008850 support.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I1ef41c67737b7b5fdf1d892929a2d8040effc282
This commit is contained in:
Jiafei Pan 2021-10-21 16:57:58 +08:00
parent de9e57ff1f
commit 3d14a30b88
5 changed files with 55 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
plat/nxp/common/soc_errata/errata.c
View File

@ -14,6 +14,10 @@ void soc_errata(void)
#ifdef ERRATA_SOC_A050426
INFO("SoC workaround for Errata A050426 was applied\n");
erratum_a050426();
#endif
#ifdef ERRATA_SOC_A008850
INFO("SoC workaround for Errata A008850 Early-Phase was applied\n");
erratum_a008850_early();
#endif
/*
* The following DDR Erratas workaround are implemented in DDR driver,

2
plat/nxp/common/soc_errata/errata.h
View File

@ -8,6 +8,8 @@
#ifndef ERRATA_H
#define ERRATA_H
#include "errata_list.h"
void soc_errata(void);
#endif /* ERRATA_H */

3
plat/nxp/common/soc_errata/errata.mk
View File

@ -8,7 +8,8 @@
# applied.
ERRATA := \
ERRATA_SOC_A050426
ERRATA_SOC_A050426 \
ERRATA_SOC_A008850
define enable_errata
$(1) ?= 0

42
plat/nxp/common/soc_errata/errata_a008850.c Normal file
View File

@ -0,0 +1,42 @@
/*
* Copyright 2021 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#include <cci.h>
#include <common/debug.h>
#include <ls_interconnect.h>
#include <mmio.h>
#include <platform_def.h>
void erratum_a008850_early(void)
{
/* part 1 of 2 */
uintptr_t cci_base = NXP_CCI_ADDR;
uint32_t val = mmio_read_32(cci_base + CTRL_OVERRIDE_REG);
/* enabling forced barrier termination on CCI400 */
mmio_write_32(cci_base + CTRL_OVERRIDE_REG,
(val | CCI_TERMINATE_BARRIER_TX));
}
void erratum_a008850_post(void)
{
/* part 2 of 2 */
uintptr_t cci_base = NXP_CCI_ADDR;
uint32_t val = mmio_read_32(cci_base + CTRL_OVERRIDE_REG);
/* Clear the BARRIER_TX bit */
val = val & ~(CCI_TERMINATE_BARRIER_TX);
/*
* Disable barrier termination on CCI400, allowing
* barriers to propagate across CCI
*/
mmio_write_32(cci_base + CTRL_OVERRIDE_REG, val);
INFO("SoC workaround for Errata A008850 Post-Phase was applied\n");
}

5
plat/nxp/common/soc_errata/errata_list.h
View File

@ -12,4 +12,9 @@
void erratum_a050426(void);
#endif
#ifdef ERRATA_SOC_A008850
void erratum_a008850_early(void);
void erratum_a008850_post(void);
#endif
#endif /* ERRATA_LIST_H */