board/rddaniel: intialize tzc400 controllers
A TZC400 controller is placed inline on DRAM channels and regulates the secure and non-secure accesses to both secure and non-secure regions of the DRAM memory. Configure each of the TZC controllers accordingly. Change-Id: I75f6d13591a7fe9e50ce15c793e35a8018041815 Signed-off-by: Suyash Pathak <suyash.pathak@arm.com>
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@ -21,6 +21,21 @@
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#define CSS_SYSTEM_PWR_DMN_LVL ARM_PWR_LVL2
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#define PLAT_MAX_PWR_LVL ARM_PWR_LVL1
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/* TZC Related Constants */
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#define PLAT_ARM_TZC_BASE UL(0x21830000)
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#define PLAT_ARM_TZC_FILTERS TZC_400_REGION_ATTR_FILTER_BIT(0)
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#define TZC400_OFFSET UL(0x1000000)
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#define TZC400_COUNT 4
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#define TZC400_BASE(n) (PLAT_ARM_TZC_BASE + \
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(n * TZC400_OFFSET))
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#define TZC_NSAID_ALL_AP U(0)
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#define PLAT_ARM_TZC_NS_DEV_ACCESS \
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(TZC_REGION_ACCESS_RDWR(TZC_NSAID_ALL_AP))
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/*
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* Physical and virtual address space limits for MMU in AARCH64 & AARCH32 modes
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*/
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@ -18,6 +18,8 @@ BL2_SOURCES += ${RDDANIEL_BASE}/rddaniel_plat.c \
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${RDDANIEL_BASE}/rddaniel_security.c \
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${RDDANIEL_BASE}/rddaniel_err.c \
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lib/utils/mem_region.c \
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drivers/arm/tzc/tzc400.c \
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plat/arm/common/arm_tzc400.c \
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plat/arm/common/arm_nor_psci_mem_protect.c
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BL31_SOURCES += ${SGI_CPU_SOURCES} \
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@ -4,9 +4,19 @@
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <plat/arm/common/plat_arm.h>
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#include <platform_def.h>
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static const arm_tzc_regions_info_t tzc_regions[] = {
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ARM_TZC_REGIONS_DEF,
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{}
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};
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/* Initialize the secure environment */
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void plat_arm_security_setup(void)
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{
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int i;
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for (i = 0; i < TZC400_COUNT; i++)
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arm_tzc400_setup(TZC400_BASE(i), tzc_regions);
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}
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