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fix(drivers/marvell/comphy-3700): fix comment about COMPHY status register 

Fix comment about COMPHY status register. PCIe/GbE0 PHY is on lane 1,
while USB3/GbE1 on lane 0.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Change-Id: I24734a61727d56f6eab2ed1c366d7a1810dbe19d
This commit is contained in:
Marek Behún 2021-12-02 19:14:37 +01:00
parent 6ba97f83db
commit 4bcfd8c02e
1 changed files with 2 additions and 2 deletions
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4
drivers/marvell/comphy/phy-comphy-3700.h
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@ -238,8 +238,8 @@ enum {
#define SD_SPEED_3_125_G 0x8
/* COMPHY status reg:
* lane0: PCIe/GbE0 PHY Status 1
* lane1: USB3/GbE1 PHY Status 1
* lane0: USB3/GbE1 PHY Status 1
* lane1: PCIe/GbE0 PHY Status 1
*/
#define COMPHY_PHY_STATUS_OFFSET(lane) (0x18 + (1 - (lane)) * 0x28)
#define PHY_RX_INIT_DONE_BIT BIT(0)