fix(errata): workaround for Neoverse V1 erratum 2216392

Neoverse V1 erratum 2216392 is a Cat B erratum present in the V1 core.
It applies to revisions r1p0 and r1p1 and is still open. The issue is
also present in r0p0 but there is no workaround in that revision.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1401781

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ic2f90d79c75e8ffef01aac81eddf1bfd8b7164ab

docs/design/cpu-specific-build-macros.rst

@@ -378,6 +378,11 @@ For Neoverse V1, the following errata build flags are defined :
    CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the CPU.
    It is still open.
 
+-  ``ERRATA_V1_2216392``: This applies errata 2216392 workaround to Neoverse-V1
+   CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the
+   issue is present in r0p0 as well but there is no workaround for that
+   revision.  It is still open.
+
 For Cortex-A710, the following errata build flags are defined :
 
 -  ``ERRATA_A710_1987031``: This applies errata 1987031 workaround to

lib/cpus/aarch64/neoverse_v1.S

@@ -288,6 +288,43 @@ func check_errata_2108267
 	b	cpu_rev_var_ls
 endfunc check_errata_2108267
 
+	/* --------------------------------------------------
+	 * Errata Workaround for Neoverse V1 Errata #2216392.
+	 * This applies to revisions r1p0 and r1p1 and is
+	 * still open.
+	 * This issue is also present in r0p0 but there is no
+	 * workaround in that revision.
+	 * x0: variant[4:7] and revision[0:3] of current cpu.
+	 * Shall clobber: x0-x17
+	 * --------------------------------------------------
+	 */
+func errata_neoverse_v1_2216392_wa
+	/* Check workaround compatibility. */
+	mov	x17, x30
+	bl	check_errata_2216392
+	cbz	x0, 1f
+
+	ldr	x0, =0x5
+	msr	S3_6_c15_c8_0, x0 /* CPUPSELR_EL3 */
+	ldr	x0, =0x10F600E000
+	msr	S3_6_c15_c8_2, x0 /* CPUPOR_EL3 */
+	ldr	x0, =0x10FF80E000
+	msr	S3_6_c15_c8_3, x0 /* CPUPMR_EL3 */
+	ldr	x0, =0x80000000003FF
+	msr	S3_6_c15_c8_1, x0 /* CPUPCR_EL3 */
+
+	isb
+1:
+	ret	x17
+endfunc errata_neoverse_v1_2216392_wa
+
+func check_errata_2216392
+	/* Applies to revisions r1p0 and r1p1. */
+	mov	x1, #CPU_REV(1, 0)
+	mov	x2, #CPU_REV(1, 1)
+	b	cpu_rev_var_range
+endfunc check_errata_2216392
+
 	/* ---------------------------------------------
 	 * HW will do the cache maintenance while powering down
 	 * ---------------------------------------------
@@ -326,6 +363,7 @@ func neoverse_v1_errata_report
 	report_errata ERRATA_V1_1966096, neoverse_v1, 1966096
 	report_errata ERRATA_V1_2139242, neoverse_v1, 2139242
 	report_errata ERRATA_V1_2108267, neoverse_v1, 2108267
+	report_errata ERRATA_V1_2216392, neoverse_v1, 2216392
 
 	ldp	x8, x30, [sp], #16
 	ret
@@ -379,6 +417,11 @@ func neoverse_v1_reset_func
 	bl	errata_neoverse_v1_2108267_wa
 #endif
 
+#if ERRATA_V1_2216392
+	mov	x0, x18
+	bl	errata_neoverse_v1_2216392_wa
+#endif
+
 	ret	x19
 endfunc neoverse_v1_reset_func
 

lib/cpus/cpu-ops.mk

@@ -430,6 +430,11 @@ ERRATA_V1_2139242	?=0
 # to revisions r0p0, r1p0, and r1p1 of the Neoverse V1 cpu and is still open.
 ERRATA_V1_2108267	?=0
 
+# Flag to apply erratum 2216392 workaround during reset. This erratum applies
+# to revisions r1p0 and r1p1 of the Neoverse V1 cpu and is still open. This
+# issue exists in r0p0 as well but there is no workaround for that revision.
+ERRATA_V1_2216392	?=0
+
 # Flag to apply erratum 1987031 workaround during reset. This erratum applies
 # to revisions r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is still open.
 ERRATA_A710_1987031	?=0
@@ -851,6 +856,10 @@ $(eval $(call add_define,ERRATA_V1_2139242))
 $(eval $(call assert_boolean,ERRATA_V1_2108267))
 $(eval $(call add_define,ERRATA_V1_2108267))
 
+# Process ERRATA_V1_2216392 flag
+$(eval $(call assert_boolean,ERRATA_V1_2216392))
+$(eval $(call add_define,ERRATA_V1_2216392))
+
 # Process ERRATA_A710_1987031 flag
 $(eval $(call assert_boolean,ERRATA_A710_1987031))
 $(eval $(call add_define,ERRATA_A710_1987031))