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Merge pull request #1652 from antonio-nino-diaz-arm/an/decouple-arm 

poplar, warp7, ls1043: Decouple from plat/arm files
This commit is contained in:
Antonio Niño Díaz 2018-10-30 16:06:41 +01:00 committed by GitHub
parent 2eedba9a55 6333e135c5
commit 55dd52a39d
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GPG Key ID: 4AEE18F83AFDEB23
10 changed files with 179 additions and 28 deletions
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87
plat/hisilicon/poplar/aarch64/poplar_helpers.S Normal file
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@ -0,0 +1,87 @@
/*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <asm_macros.S>
#include <platform_def.h>
.globl plat_my_core_pos
.globl poplar_calc_core_pos
.globl plat_crash_console_init
.globl plat_crash_console_putc
.globl plat_crash_console_flush
.globl platform_mem_init
/* -----------------------------------------------------
* unsigned int plat_my_core_pos(void)
* This function uses poplar_calc_core_pos()
* definition to get the index of the calling CPU.
* -----------------------------------------------------
*/
func plat_my_core_pos
mrs x0, mpidr_el1
b poplar_calc_core_pos
endfunc plat_my_core_pos
/* -----------------------------------------------------
* unsigned int poplar_calc_core_pos(u_register_t mpidr)
* Helper function to calculate the core position.
* With this function: CorePos = (ClusterId * 4) +
* CoreId
* -----------------------------------------------------
*/
func poplar_calc_core_pos
and x1, x0, #MPIDR_CPU_MASK
and x0, x0, #MPIDR_CLUSTER_MASK
add x0, x1, x0, LSR #6
ret
endfunc poplar_calc_core_pos
/* ---------------------------------------------
* int plat_crash_console_init(void)
* Function to initialize the crash console
* without a C Runtime to print crash report.
* Clobber list : x0 - x4
* ---------------------------------------------
*/
func plat_crash_console_init
mov_imm x0, POPLAR_CRASH_UART_BASE
mov_imm x1, POPLAR_CRASH_UART_CLK_IN_HZ
mov_imm x2, POPLAR_CONSOLE_BAUDRATE
b console_pl011_core_init
endfunc plat_crash_console_init
/* ---------------------------------------------
* int plat_crash_console_putc(int c)
* Function to print a character on the crash
* console without a C Runtime.
* Clobber list : x1, x2
* ---------------------------------------------
*/
func plat_crash_console_putc
mov_imm x1, POPLAR_CRASH_UART_BASE
b console_pl011_core_putc
endfunc plat_crash_console_putc
/* ---------------------------------------------
* int plat_crash_console_flush()
* Function to force a write of all buffered
* data that hasn't been output.
* Out : return -1 on error else return 0.
* Clobber list : r0
* ---------------------------------------------
*/
func plat_crash_console_flush
mov_imm x0, POPLAR_CRASH_UART_BASE
b console_pl011_core_flush
endfunc plat_crash_console_flush
/* ---------------------------------------------------------------------
* We don't need to carry out any memory initialization on ARM
* platforms. The Secure RAM is accessible straight away.
* ---------------------------------------------------------------------
*/
func platform_mem_init
ret
endfunc platform_mem_init

9
plat/hisilicon/poplar/bl31_plat_setup.c
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -15,13 +15,12 @@
#include <errno.h>
#include <generic_delay_timer.h>
#include <mmio.h>
#include <plat_arm.h>
#include <platform.h>
#include <platform_def.h>
#include <stddef.h>
#include <string.h>
#include "hi3798cv200.h"
#include "plat_private.h"
#include "platform_def.h"
/* Memory ranges for code and RO data sections */
#define BL31_RO_BASE (unsigned long)(&__RO_START__)
@ -113,8 +112,8 @@ void bl31_platform_setup(void)
generic_delay_timer_init();
/* Init GIC distributor and CPU interface */
plat_arm_gic_driver_init();
plat_arm_gic_init();
poplar_gic_driver_init();
poplar_gic_init();
/* Init security properties of IP blocks */
hisi_tzpc_sec_init();

9
plat/hisilicon/poplar/include/plat_private.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -26,4 +26,11 @@ void plat_configure_mmu_el1(unsigned long total_base,
void plat_io_setup(void);
unsigned int poplar_calc_core_pos(u_register_t mpidr);
void poplar_gic_driver_init(void);
void poplar_gic_init(void);
void poplar_gic_cpuif_enable(void);
void poplar_gic_pcpu_init(void);
#endif /* __PLAT_PRIVATE_H__ */

14
plat/hisilicon/poplar/include/platform_def.h
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@ -22,9 +22,9 @@
#define PLATFORM_LINKER_FORMAT "elf64-littleaarch64"
#define PLATFORM_LINKER_ARCH aarch64
#define PLAT_ARM_CRASH_UART_BASE PL011_UART0_BASE
#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PL011_UART0_CLK_IN_HZ
#define ARM_CONSOLE_BAUDRATE PL011_BAUDRATE
#define POPLAR_CRASH_UART_BASE PL011_UART0_BASE
#define POPLAR_CRASH_UART_CLK_IN_HZ PL011_UART0_CLK_IN_HZ
#define POPLAR_CONSOLE_BAUDRATE PL011_BAUDRATE
/* Generic platform constants */
#define PLATFORM_STACK_SIZE (0x800)
@ -134,10 +134,10 @@
#define PLAT_MAX_RET_STATE U(1)
/* Interrupt controller */
#define PLAT_ARM_GICD_BASE GICD_BASE
#define PLAT_ARM_GICC_BASE GICC_BASE
#define POPLAR_GICD_BASE GICD_BASE
#define POPLAR_GICC_BASE GICC_BASE
#define PLAT_ARM_G1S_IRQ_PROPS(grp) \
#define POPLAR_G1S_IRQ_PROPS(grp) \
INTR_PROP_DESC(HISI_IRQ_SEC_SGI_0, GIC_HIGHEST_SEC_PRIORITY, grp, \
GIC_INTR_CFG_LEVEL), \
INTR_PROP_DESC(HISI_IRQ_SEC_SGI_1, GIC_HIGHEST_SEC_PRIORITY, grp, \
@ -165,6 +165,6 @@
INTR_PROP_DESC(HISI_IRQ_SEC_AXI, GIC_HIGHEST_SEC_PRIORITY, grp, \
GIC_INTR_CFG_LEVEL)
#define PLAT_ARM_G0_IRQ_PROPS(grp)
#define POPLAR_G0_IRQ_PROPS(grp)
#endif /* PLATFORM_DEF_H */

9
plat/hisilicon/poplar/plat_pm.c
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -12,12 +12,11 @@
#include <context_mgmt.h>
#include <debug.h>
#include <mmio.h>
#include <plat_arm.h>
#include <platform.h>
#include <platform_def.h>
#include <psci.h>
#include "hi3798cv200.h"
#include "plat_private.h"
#include "platform_def.h"
#define REG_PERI_CPU_RVBARADDR 0xF8A80034
#define REG_PERI_CPU_AARCH_MODE 0xF8A80030
@ -76,10 +75,10 @@ static void poplar_pwr_domain_on_finish(const psci_power_state_t *target_state)
PLAT_MAX_OFF_STATE);
/* Enable the gic cpu interface */
plat_arm_gic_pcpu_init();
poplar_gic_pcpu_init();
/* Program the gic per-cpu distributor or re-distributor interface */
plat_arm_gic_cpuif_enable();
poplar_gic_cpuif_enable();
}
static void poplar_pwr_domain_suspend_finish(

6
plat/hisilicon/poplar/plat_topology.c
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@ -1,13 +1,13 @@
/*
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <arch.h>
#include <plat_arm.h>
#include <psci.h>
#include "platform_def.h"
#include "plat_private.h"
const unsigned char hisi_power_domain_tree_desc[] = {
PLATFORM_CLUSTER_COUNT,
@ -27,5 +27,5 @@ int plat_core_pos_by_mpidr(u_register_t mpidr)
if ((mpidr & MPIDR_CPU_MASK) >= PLATFORM_CORE_COUNT)
return -1;
return plat_arm_calc_core_pos(mpidr);
return poplar_calc_core_pos(mpidr);
}

9
plat/hisilicon/poplar/platform.mk
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@ -1,5 +1,5 @@
#
# Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -53,7 +53,6 @@ PLAT_PL061_MAX_GPIOS := 104
$(eval $(call add_define,PLAT_PL061_MAX_GPIOS))
PLAT_INCLUDES := -Iplat/hisilicon/poplar/include \
-Iinclude/plat/arm/common/ \
-Iplat/hisilicon/poplar \
-Iinclude/common/tbbr \
-Iinclude/drivers/synopsys \
@ -68,10 +67,10 @@ PLAT_BL_COMMON_SOURCES := \
drivers/delay_timer/delay_timer.c \
drivers/arm/pl011/aarch64/pl011_console.S \
drivers/arm/gic/v2/gicv2_main.c \
plat/arm/common/aarch64/arm_helpers.S \
plat/arm/common/arm_gicv2.c \
plat/common/plat_gicv2.c \
plat/hisilicon/poplar/aarch64/platform_common.c
plat/hisilicon/poplar/aarch64/platform_common.c \
plat/hisilicon/poplar/aarch64/poplar_helpers.S \
plat/hisilicon/poplar/poplar_gicv2.c
BL1_SOURCES += \
lib/cpus/aarch64/cortex_a53.S \

62
plat/hisilicon/poplar/poplar_gicv2.c Normal file
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@ -0,0 +1,62 @@
/*
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <gicv2.h>
#include <platform.h>
#include <platform_def.h>
/******************************************************************************
* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
* interrupts.
*****************************************************************************/
static const interrupt_prop_t poplar_interrupt_props[] = {
POPLAR_G1S_IRQ_PROPS(GICV2_INTR_GROUP0),
POPLAR_G0_IRQ_PROPS(GICV2_INTR_GROUP0)
};
static unsigned int target_mask_array[PLATFORM_CORE_COUNT];
static const gicv2_driver_data_t poplar_gic_data = {
.gicd_base = POPLAR_GICD_BASE,
.gicc_base = POPLAR_GICC_BASE,
.interrupt_props = poplar_interrupt_props,
.interrupt_props_num = ARRAY_SIZE(poplar_interrupt_props),
.target_masks = target_mask_array,
.target_masks_num = ARRAY_SIZE(target_mask_array),
};
/******************************************************************************
* Helper to initialize the GICv2 only driver.
*****************************************************************************/
void poplar_gic_driver_init(void)
{
gicv2_driver_init(&poplar_gic_data);
}
void poplar_gic_init(void)
{
gicv2_distif_init();
gicv2_pcpu_distif_init();
gicv2_set_pe_target_mask(plat_my_core_pos());
gicv2_cpuif_enable();
}
/******************************************************************************
* Helper to enable the GICv2 CPU interface
*****************************************************************************/
void poplar_gic_cpuif_enable(void)
{
gicv2_cpuif_enable();
}
/******************************************************************************
* Helper to initialize the per cpu distributor interface in GICv2
*****************************************************************************/
void poplar_gic_pcpu_init(void)
{
gicv2_pcpu_distif_init();
gicv2_set_pe_target_mask(plat_my_core_pos());
}

1
plat/imx/imx7/warp7/platform.mk
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@ -22,7 +22,6 @@ endif
# Platform
PLAT_INCLUDES := -Idrivers/imx/uart \
-Iinclude/common/tbbr \
-Iinclude/plat/arm/common/ \
-Iplat/imx/common/include/ \
-Iplat/imx/imx7/warp7/include \
-Idrivers/imx/timer \

1
plat/layerscape/board/ls1043/platform.mk
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@ -22,7 +22,6 @@ LS1043_SECURITY_SOURCES := plat/layerscape/common/ls_tzc380.c \
plat/layerscape/board/ls1043/ls1043_security.c
PLAT_INCLUDES := -Iplat/layerscape/board/ls1043/include \
-Iinclude/plat/arm/common \
-Iplat/layerscape/common/include \
-Iinclude/drivers/arm \
-Iinclude/lib \