drivers/gicv3: also shift eSPI register offset in GICD_OFFSET_64()
ESPI register offset should also be shifted right by REG##R_SHIFT to keep consistent. It is not a functional issue, for GICD_OFFSET_64() is only used for GICD_IROUTER<E>, and IROUTER_SHIFT is 0. Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com> Change-Id: I76eee5c50e4300890e78e80bddde135ce88daa2d
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -48,7 +48,8 @@
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#define GICD_OFFSET_64(REG, id) \
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(((id) <= MAX_SPI_ID) ? \
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GICD_##REG##R + (((uintptr_t)(id) >> REG##R_SHIFT) << 3) : \
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GICD_##REG##RE + (((uintptr_t)(id) - MIN_ESPI_ID) << 3))
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GICD_##REG##RE + ((((uintptr_t)(id) - MIN_ESPI_ID) >> \
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REG##R_SHIFT) << 3))
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#else /* GICv3 */
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#define GICD_OFFSET_8(REG, id) \
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