Tegra210: se: disable SMMU before suspending SE block
This patch disables SMMU hardware before suspending the SE block, for the context save operation to complete. The NS word will re-enable SMMU when we exit System Suspend. Change-Id: I4d5cd982ea6780db5c38b124550d847e3928c60d Signed-off-by: Samuel Payne <spayne@nvidia.com>
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@ -153,6 +153,10 @@
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#define MC_VIDEO_PROTECT_BASE_LO U(0x648)
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#define MC_VIDEO_PROTECT_SIZE_MB U(0x64c)
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/* SMMU configuration registers*/
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#define MC_SMMU_PPCS_ASID_0 0x270UL
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#define PPCS_SMMU_ENABLE (0x1U << 31)
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/*******************************************************************************
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* Tegra SE constants
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******************************************************************************/
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@ -401,6 +401,14 @@ void tegra_se_init(void)
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int32_t tegra_se_suspend(void)
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{
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int32_t ret = 0;
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uint32_t val = 0;
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/* SE does not use SMMU in EL3, disable SMMU.
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* This will be re-enabled by kernel on resume */
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val = mmio_read_32(TEGRA_MC_BASE + MC_SMMU_PPCS_ASID_0);
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val &= ~PPCS_SMMU_ENABLE;
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mmio_write_32(TEGRA_MC_BASE + MC_SMMU_PPCS_ASID_0, val);
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/* Atomic context save se2 and pka1 */
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INFO("%s: SE2/PKA1 atomic context save\n", __func__);
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