Merge "intel: agilex: Fix psci power domain off" into integration
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8911a32a4d
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@ -61,18 +61,12 @@ int socfpga_pwr_domain_on(u_register_t mpidr)
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******************************************************************************/
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void socfpga_pwr_domain_off(const psci_power_state_t *target_state)
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{
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unsigned int cpu_id = plat_my_core_pos();
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for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
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VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
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__func__, i, target_state->pwr_domain_state[i]);
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/* TODO: Prevent interrupts from spuriously waking up this cpu */
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/* gicv2_cpuif_disable(); */
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/* assert core reset */
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mmio_setbits_32(AGX_RSTMGR_OFST + AGX_RSTMGR_MPUMODRST_OFST,
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1 << cpu_id);
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/* Prevent interrupts from spuriously waking up this cpu */
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gicv2_cpuif_disable();
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}
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/*******************************************************************************
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