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feat(intel): add SMC support for Get USERCODE 

This patch adds SMC support for enquiring FPGA's User Code.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I82c1fa9390b6f7509b2284d51e199fb8b6a9b1ad
This commit is contained in:
Sieu Mun Tang 2022-04-27 18:57:29 +08:00
parent c026dfe38c
commit 93a5b97ec9
3 changed files with 22 additions and 0 deletions
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1
plat/intel/soc/common/include/socfpga_mailbox.h
View File

@ -42,6 +42,7 @@
#define MBOX_CMD_CANCEL 0x03
#define MBOX_CMD_VAB_SRC_CERT 0x0B
#define MBOX_CMD_GET_IDCODE 0x10
#define MBOX_CMD_GET_USERCODE 0x13
#define MBOX_CMD_REBOOT_HPS 0x47
/* Reconfiguration Commands */

2
plat/intel/soc/common/include/socfpga_sip_svc.h
View File

@ -62,6 +62,8 @@
#define INTEL_SIP_SMC_FIRMWARE_VERSION 0xC200001F
#define INTEL_SIP_SMC_HPS_SET_BRIDGES 0xC2000032
/* Mailbox Command */
#define INTEL_SIP_SMC_GET_USERCODE 0xC200003D
/* SiP Definitions */

19
plat/intel/soc/common/socfpga_sip_svc.c
View File

@ -482,6 +482,21 @@ static uint32_t intel_mbox_send_cmd(uint32_t cmd, uint32_t *args,
return INTEL_SIP_SMC_STATUS_OK;
}
static int intel_smc_get_usercode(uint32_t *user_code)
{
int status;
unsigned int resp_len = sizeof(user_code) / MBOX_WORD_BYTE;
status = mailbox_send_cmd(MBOX_JOB_ID, MBOX_CMD_GET_USERCODE, NULL,
0U, CMD_CASUAL, user_code, &resp_len);
if (status < 0) {
return INTEL_SIP_SMC_STATUS_ERROR;
}
return INTEL_SIP_SMC_STATUS_OK;
}
/* Miscellaneous HPS services */
static uint32_t intel_hps_set_bridges(uint64_t enable)
{
@ -649,6 +664,10 @@ uintptr_t sip_smc_handler(uint32_t smc_fid,
&len_in_resp);
SMC_RET3(handle, status, mbox_status, len_in_resp);
case INTEL_SIP_SMC_GET_USERCODE:
status = intel_smc_get_usercode(&retval);
SMC_RET2(handle, status, retval);
case INTEL_SIP_SMC_GET_ROM_PATCH_SHA384:
status = intel_fcs_get_rom_patch_sha384(x1, &retval64,
&mbox_error);