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fix(plat/mediatek/mt8195): extend MMU region size 

In mt8195 suspend/resume flow, ATF has to communicate with a subsys by
read/write the subsys registers. However, the register region of subsys
doesn't include in the MMU mapping region. It triggers MMU faults.

This patch extends the MMU region 0 size to cover all mt8195 HW modules.
This patch also remove MMU region 1 because region 0 covers region 1.

Change-Id: I3a186ed71d0d963b59ae55e27a6d27a01fe4f638
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
This commit is contained in:
Tinghan Shen 2021-06-18 11:33:16 +08:00 committed by Rex-BC Chen
parent 365e0f7764
commit 9ff8b8ca93
2 changed files with 1 additions and 5 deletions
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2
plat/mediatek/mt8195/aarch64/platform_common.c
View File

@ -13,8 +13,6 @@ const mmap_region_t plat_mmap[] = {
/* for TF text, RO, RW */
MAP_REGION_FLAT(MTK_DEV_RNG0_BASE, MTK_DEV_RNG0_SIZE,
MT_DEVICE | MT_RW | MT_SECURE),
MAP_REGION_FLAT(MTK_DEV_RNG1_BASE, MTK_DEV_RNG1_SIZE,
MT_DEVICE | MT_RW | MT_SECURE),
MAP_REGION_FLAT(MTK_DEV_RNG2_BASE, MTK_DEV_RNG2_SIZE,
MT_DEVICE | MT_RW | MT_SECURE),
MAP_REGION_FLAT(DP_SEC_BASE, DP_SEC_SIZE,

4
plat/mediatek/mt8195/include/platform_def.h
View File

@ -15,9 +15,7 @@
/* Aggregate of all devices for MMU mapping */
#define MTK_DEV_RNG0_BASE IO_PHYS
#define MTK_DEV_RNG0_SIZE 0x400000
#define MTK_DEV_RNG1_BASE (IO_PHYS + 0x1000000)
#define MTK_DEV_RNG1_SIZE 0xa110000
#define MTK_DEV_RNG0_SIZE 0x10000000
#define MTK_DEV_RNG2_BASE MT_GIC_BASE
#define MTK_DEV_RNG2_SIZE 0x600000
#define MTK_MCDI_SRAM_BASE 0x11B000