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Cortex-A55: Implement workaround for erratum 778703 

Change-Id: I094e5cb2c44618e7a4116af5fbb6b18078a79951
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
This commit is contained in:
Ambroise Vincent 2019-02-21 16:25:37 +00:00
parent 1afeee9275
commit a6cc661016
4 changed files with 70 additions and 0 deletions
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3
docs/cpu-specific-build-macros.rst
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@ -102,6 +102,9 @@ For Cortex-A55, the following errata build flags are defined :
- ``ERRATA_A55_768277``: This applies errata 768277 workaround to Cortex-A55
CPU. This needs to be enabled only for revision r0p0 of the CPU.
- ``ERRATA_A55_778703``: This applies errata 778703 workaround to Cortex-A55
CPU. This needs to be enabled only for revision r0p0 of the CPU.
For Cortex-A57, the following errata build flags are defined :
- ``ERRATA_A57_806969``: This applies errata 806969 workaround to Cortex-A57

10
include/lib/cpus/aarch64/cortex_a55.h
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@ -18,13 +18,23 @@
#define CORTEX_A55_CPUPWRCTLR_EL1 S3_0_C15_C2_7
#define CORTEX_A55_CPUECTLR_EL1 S3_0_C15_C1_4
#define CORTEX_A55_CPUECTLR_EL1_L1WSCTL (ULL(3) << 25)
/*******************************************************************************
* CPU Auxiliary Control register specific definitions.
******************************************************************************/
#define CORTEX_A55_CPUACTLR_EL1 S3_0_C15_C1_0
#define CORTEX_A55_CPUACTLR_EL1_DISABLE_WRITE_STREAMING (ULL(1) << 24)
#define CORTEX_A55_CPUACTLR_EL1_DISABLE_DUAL_ISSUE (ULL(1) << 31)
/*******************************************************************************
* CPU Identification register specific definitions.
******************************************************************************/
#define CORTEX_A55_CLIDR_EL1 S3_1_C0_C0_1
#define CORTEX_A55_CLIDR_EL1_CTYPE3 (ULL(7) << 6)
/* Definitions of register field mask in CORTEX_A55_CPUPWRCTLR_EL1 */
#define CORTEX_A55_CORE_PWRDN_EN_MASK U(0x1)

49
lib/cpus/aarch64/cortex_a55.S
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@ -39,6 +39,49 @@ func check_errata_768277
b cpu_rev_var_ls
endfunc check_errata_768277
/* ------------------------------------------------------------------
* Errata Workaround for Cortex A55 Errata #778703.
* This applies only to revision r0p0 of Cortex A55 where L2 cache is
* not configured.
* Inputs:
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* ------------------------------------------------------------------
*/
func errata_a55_778703_wa
/*
* Compare x0 against revision r0p0 and check that no private L2 cache
* is configured
*/
mov x17, x30
bl check_errata_778703
cbz x0, 1f
mrs x1, CORTEX_A55_CPUECTLR_EL1
orr x1, x1, #CORTEX_A55_CPUECTLR_EL1_L1WSCTL
msr CORTEX_A55_CPUECTLR_EL1, x1
mrs x1, CORTEX_A55_CPUACTLR_EL1
orr x1, x1, #CORTEX_A55_CPUACTLR_EL1_DISABLE_WRITE_STREAMING
msr CORTEX_A55_CPUACTLR_EL1, x1
isb
1:
ret x17
endfunc errata_a55_778703_wa
func check_errata_778703
mov x16, x30
mov x1, #0x00
bl cpu_rev_var_ls
/*
* Check that no private L2 cache is configured
*/
mrs x1, CORTEX_A55_CLIDR_EL1
and x1, x1, CORTEX_A55_CLIDR_EL1_CTYPE3
cmp x1, #0
mov x2, #ERRATA_NOT_APPLIES
csel x0, x0, x2, eq
ret x16
endfunc check_errata_778703
func cortex_a55_reset_func
mov x19, x30
@ -54,6 +97,11 @@ func cortex_a55_reset_func
bl errata_a55_768277_wa
#endif
#if ERRATA_A55_778703
mov x0, x18
bl errata_a55_778703_wa
#endif
ret x19
endfunc cortex_a55_reset_func
@ -88,6 +136,7 @@ func cortex_a55_errata_report
*/
report_errata ERRATA_DSU_936184, cortex_a55, dsu_936184
report_errata ERRATA_A55_768277, cortex_a55, 768277
report_errata ERRATA_A55_778703, cortex_a55, 778703
ldp x8, x30, [sp], #16
ret

8
lib/cpus/cpu-ops.mk
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@ -83,6 +83,10 @@ ERRATA_A53_855873 ?=0
# only to revision r0p0 of the Cortex A55 cpu.
ERRATA_A55_768277 ?=0
# Flag to apply erratum 778703 workaround during reset. This erratum applies
# only to revision r0p0 of the Cortex A55 cpu.
ERRATA_A55_778703 ?=0
# Flag to apply erratum 806969 workaround during reset. This erratum applies
# only to revision r0p0 of the Cortex A57 cpu.
ERRATA_A57_806969 ?=0
@ -156,6 +160,10 @@ $(eval $(call add_define,ERRATA_A53_855873))
$(eval $(call assert_boolean,ERRATA_A55_768277))
$(eval $(call add_define,ERRATA_A55_768277))
# Process ERRATA_A55_778703 flag
$(eval $(call assert_boolean,ERRATA_A55_778703))
$(eval $(call add_define,ERRATA_A55_778703))
# Process ERRATA_A57_806969 flag
$(eval $(call assert_boolean,ERRATA_A57_806969))
$(eval $(call add_define,ERRATA_A57_806969))