Control inclusion of helper code used for asserts

Many asserts depend on code that is conditionally compiled based on the
DEBUG define. This patch modifies the conditional inclusion of such code
so that it is based on the ENABLE_ASSERTIONS build option.

Change-Id: I6406674788aa7e1ad7c23d86ce94482ad3c382bd
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
This commit is contained in:
Antonio Nino Diaz 2017-03-22 15:48:51 +00:00
parent 044bb2faab
commit aa61368eb5
12 changed files with 32 additions and 30 deletions

View File

@ -114,7 +114,7 @@ void bl1_main(void)
print_errata_status();
#if DEBUG
#if ENABLE_ASSERTIONS
u_register_t val;
/*
* Ensure that MMU/Caches and coherency are turned on
@ -141,7 +141,7 @@ void bl1_main(void)
assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val));
else
assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE);
#endif
#endif /* ENABLE_ASSERTIONS */
/* Perform remaining generic architectural setup from EL3 */
bl1_arch_setup();

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -39,7 +39,7 @@ static uintptr_t g_cci_base;
static unsigned int g_max_master_id;
static const int *g_cci_slave_if_map;
#if DEBUG
#if ENABLE_ASSERTIONS
static int validate_cci_map(const int *map)
{
unsigned int valid_cci_map = 0;
@ -73,7 +73,7 @@ static int validate_cci_map(const int *map)
return 1;
}
#endif /* DEBUG */
#endif /* ENABLE_ASSERTIONS */
void cci_init(uintptr_t cci_base,
const int *map,

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@ -81,7 +81,7 @@ static inline void ccn_reg_write(uintptr_t periphbase,
mmio_write_64(region_base + register_offset, value);
}
#if DEBUG
#if ENABLE_ASSERTIONS
typedef struct rn_info {
unsigned char node_desc[MAX_RN_NODES];
@ -224,7 +224,7 @@ static void ccn_validate_plat_params(const ccn_desc_t *plat_desc)
info.node_desc[node_id]--;
}
}
#endif /* DEBUG */
#endif /* ENABLE_ASSERTIONS */
/*******************************************************************************
* This function validates parameters passed by the platform (in a debug build)
@ -234,7 +234,7 @@ static void ccn_validate_plat_params(const ccn_desc_t *plat_desc)
******************************************************************************/
void ccn_init(const ccn_desc_t *plat_desc)
{
#if DEBUG
#if ENABLE_ASSERTIONS
ccn_validate_plat_params(plat_desc);
#endif

View File

@ -193,7 +193,8 @@
nsaid_permissions); \
}
#if DEBUG
#if ENABLE_ASSERTIONS
static inline unsigned int _tzc_read_peripheral_id(uintptr_t base)
{
unsigned int id;
@ -235,6 +236,6 @@ static inline unsigned long long _tzc_get_max_top_addr(int addr_width)
(UINT64_MAX >> (64 - (addr_width)))
#endif /* AARCH32 */
#endif
#endif /* ENABLE_ASSERTIONS */
#endif /* __TZC_COMMON_PRIVATE_H__ */

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@ -257,7 +257,7 @@ void tzc_dmc500_set_action(tzc_action_t action)
static void validate_plat_driver_data(
const tzc_dmc500_driver_data_t *plat_driver_data)
{
#if DEBUG
#if ENABLE_ASSERTIONS
int i;
unsigned int dmc_id;
uintptr_t dmc_base;
@ -273,7 +273,7 @@ static void validate_plat_driver_data(
dmc_id = _tzc_read_peripheral_id(dmc_base);
assert(dmc_id == DMC500_PERIPHERAL_ID);
}
#endif /* DEBUG */
#endif /* ENABLE_ASSERTIONS */
}

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -51,8 +51,8 @@ static const io_dev_info_t *devices[MAX_IO_DEVICES];
/* Number of currently registered devices */
static unsigned int dev_count;
#if DEBUG /* Extra validation functions only used in debug builds */
/* Extra validation functions only used when asserts are enabled */
#if ENABLE_ASSERTIONS
/* Return a boolean value indicating whether a device connector is valid */
static int is_valid_dev_connector(const io_dev_connector_t *dev_con)
@ -89,7 +89,8 @@ static int is_valid_seek_mode(io_seek_mode_t mode)
return ((mode != IO_SEEK_INVALID) && (mode < IO_SEEK_MAX));
}
#endif /* End of debug-only validation functions */
#endif /* ENABLE_ASSERTIONS */
/* End of extra validation functions only used when asserts are enabled */
/* Open a connection to a specific device */

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@ -87,7 +87,7 @@ void cm_set_context_by_mpidr(uint64_t mpidr,
******************************************************************************/
static inline void cm_set_next_context(void *context)
{
#if DEBUG
#if ENABLE_ASSERTIONS
uint64_t sp_mode;
/*
@ -98,7 +98,7 @@ static inline void cm_set_next_context(void *context)
: "=r" (sp_mode));
assert(sp_mode == MODE_SP_EL0);
#endif
#endif /* ENABLE_ASSERTIONS */
__asm__ volatile("msr spsel, #1\n"
"mov sp, %0\n"

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -85,13 +85,13 @@
static uint64_t base_xlation_table[NUM_BASE_LEVEL_ENTRIES]
__aligned(NUM_BASE_LEVEL_ENTRIES * sizeof(uint64_t));
#if DEBUG
#if ENABLE_ASSERTIONS
static unsigned long long get_max_supported_pa(void)
{
/* Physical address space size for long descriptor format. */
return (1ULL << 40) - 1ULL;
}
#endif
#endif /* ENABLE_ASSERTIONS */
void init_xlat_tables(void)
{

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@ -127,7 +127,7 @@ static unsigned long long calc_physical_addr_size_bits(
return TCR_PS_BITS_4GB;
}
#if DEBUG
#if ENABLE_ASSERTIONS
/* Physical Address ranges supported in the AArch64 Memory Model */
static const unsigned int pa_range_bits_arr[] = {
PARANGE_0000, PARANGE_0001, PARANGE_0010, PARANGE_0011, PARANGE_0100,
@ -144,7 +144,7 @@ static unsigned long long get_max_supported_pa(void)
return (1ULL << pa_range_bits_arr[pa_range]) - 1ULL;
}
#endif
#endif /* ENABLE_ASSERTIONS */
void init_xlat_tables(void)
{

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -109,7 +109,7 @@ void mmap_add_region(unsigned long long base_pa, uintptr_t base_va,
assert((base_pa + (unsigned long long)size - 1ULL) <=
(PLAT_PHY_ADDR_SPACE_SIZE - 1));
#if DEBUG
#if ENABLE_ASSERTIONS
/* Check for PAs and VAs overlaps with all other regions */
for (mm = mmap; mm->size; ++mm) {
@ -154,7 +154,7 @@ void mmap_add_region(unsigned long long base_pa, uintptr_t base_va,
mm = mmap; /* Restore pointer to the start of the array */
#endif /* DEBUG */
#endif /* ENABLE_ASSERTIONS */
/* Find correct place in mmap to insert new region */
while (mm->base_va < base_va && mm->size)

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@ -37,13 +37,13 @@
#include <xlat_tables_v2.h>
#include "../xlat_tables_private.h"
#if DEBUG
#if ENABLE_ASSERTIONS
static unsigned long long xlat_arch_get_max_supported_pa(void)
{
/* Physical address space size for long descriptor format. */
return (1ull << 40) - 1ull;
}
#endif /* DEBUG*/
#endif /* ENABLE_ASSERTIONS*/
int is_mmu_enabled(void)
{

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@ -77,7 +77,7 @@ static unsigned long long calc_physical_addr_size_bits(
return TCR_PS_BITS_4GB;
}
#if DEBUG
#if ENABLE_ASSERTIONS
/* Physical Address ranges supported in the AArch64 Memory Model */
static const unsigned int pa_range_bits_arr[] = {
PARANGE_0000, PARANGE_0001, PARANGE_0010, PARANGE_0011, PARANGE_0100,
@ -94,7 +94,7 @@ unsigned long long xlat_arch_get_max_supported_pa(void)
return (1ull << pa_range_bits_arr[pa_range]) - 1ull;
}
#endif /* DEBUG*/
#endif /* ENABLE_ASSERTIONS*/
int is_mmu_enabled(void)
{