Merge "Add myself and Andre Przywara as code owners for the Arm FPGA platform port" into integration
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@ -320,6 +320,14 @@ Amlogic Meson A113D (AXG) platform port
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:F: docs/plat/meson-axg.rst
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:F: plat/amlogic/axg/
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Arm FPGA platform port
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^^^^^^^^^^^^^^^^^^^^^^
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:M: Andre Przywara <andre.przywara@arm.com>
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:G: `Andre-ARM`_
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:M: Javier Almansa Sobrino <Javier.AlmansaSobrino@arm.com>
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:G: `javieralso-arm`_
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:F: plat/arm/board/arm_fpga
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Arm System Guidance for Infrastructure / Mobile FVP platforms
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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:M: Nariman Poushin <nariman.poushin@linaro.org>
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