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feat(intel): update to support maximum response data size 

Update to support maximum (4092 bytes) response data size.
And, clean up the intel_smc_service_completed function to
directly write the response data to addr to avoid additional
copy.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I0a230e73c563d22e6999ad3473587b07382dacfe
This commit is contained in:
Sieu Mun Tang 2022-05-11 10:23:13 +08:00
parent 7e25eb8701
commit b703facaaa
2 changed files with 34 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
plat/intel/soc/common/include/socfpga_sip_svc.h
View File

@ -61,7 +61,7 @@
#define INTEL_SIP_SMC_ECC_DBE 0xC200000D
/* Generic Command */
#define INTEL_SIP_SMC_MBOX_SEND_CMD 0xC200001E
#define INTEL_SIP_SMC_SERVICE_COMPLETED 0xC200001E
#define INTEL_SIP_SMC_FIRMWARE_VERSION 0xC200001F
#define INTEL_SIP_SMC_HPS_SET_BRIDGES 0xC2000032
#define INTEL_SIP_SMC_GET_ROM_PATCH_SHA384 0xC2000040
@ -69,6 +69,7 @@
#define SERVICE_COMPLETED_MODE_ASYNC 0x00004F4E
/* Mailbox Command */
#define INTEL_SIP_SMC_MBOX_SEND_CMD 0xC200003C
#define INTEL_SIP_SMC_GET_USERCODE 0xC200003D
/* FPGA Crypto Services */
@ -78,7 +79,7 @@
#define INTEL_SIP_SMC_FCS_CRYPTION_EXT 0xC2000090
#define INTEL_SIP_SMC_FCS_SERVICE_REQUEST 0x4200005C
#define INTEL_SIP_SMC_FCS_SEND_CERTIFICATE 0x4200005D
#define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA 0xC200005E
#define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA 0x4200005E
#define INTEL_SIP_SMC_FCS_CNTR_SET_PREAUTH 0xC200005F
#define INTEL_SIP_SMC_FCS_PSGSIGMA_TEARDOWN 0xC2000064
#define INTEL_SIP_SMC_FCS_CHIP_ID 0xC2000065

57
plat/intel/soc/common/socfpga_sip_svc.c
View File

@ -542,32 +542,6 @@ static int intel_smc_get_usercode(uint32_t *user_code)
return INTEL_SIP_SMC_STATUS_OK;
}
/* Miscellaneous HPS services */
uint32_t intel_hps_set_bridges(uint64_t enable, uint64_t mask)
{
int status = 0;
if (enable & SOCFPGA_BRIDGE_ENABLE) {
if ((enable & SOCFPGA_BRIDGE_HAS_MASK) != 0) {
status = socfpga_bridges_enable((uint32_t)mask);
} else {
status = socfpga_bridges_enable(~0);
}
} else {
if ((enable & SOCFPGA_BRIDGE_HAS_MASK) != 0) {
status = socfpga_bridges_disable((uint32_t)mask);
} else {
status = socfpga_bridges_disable(~0);
}
}
if (status < 0) {
return INTEL_SIP_SMC_STATUS_ERROR;
}
return INTEL_SIP_SMC_STATUS_OK;
}
uint32_t intel_smc_service_completed(uint64_t addr, uint32_t size,
uint32_t mode, uint32_t *job_id,
uint32_t *ret_size, uint32_t *mbox_error)
@ -614,6 +588,32 @@ uint32_t intel_smc_service_completed(uint64_t addr, uint32_t size,
return INTEL_SIP_SMC_STATUS_OK;
}
/* Miscellaneous HPS services */
uint32_t intel_hps_set_bridges(uint64_t enable, uint64_t mask)
{
int status = 0;
if (enable & SOCFPGA_BRIDGE_ENABLE) {
if ((enable & SOCFPGA_BRIDGE_HAS_MASK) != 0) {
status = socfpga_bridges_enable((uint32_t)mask);
} else {
status = socfpga_bridges_enable(~0);
}
} else {
if ((enable & SOCFPGA_BRIDGE_HAS_MASK) != 0) {
status = socfpga_bridges_disable((uint32_t)mask);
} else {
status = socfpga_bridges_disable(~0);
}
}
if (status < 0) {
return INTEL_SIP_SMC_STATUS_ERROR;
}
return INTEL_SIP_SMC_STATUS_OK;
}
/*
* This function is responsible for handling all SiP calls from the NS world
*/
@ -757,6 +757,11 @@ uintptr_t sip_smc_handler(uint32_t smc_fid,
status = intel_ecc_dbe_notification(x1);
SMC_RET1(handle, status);
case INTEL_SIP_SMC_SERVICE_COMPLETED:
status = intel_smc_service_completed(x1, x2, x3, &rcv_id,
&len_in_resp, &mbox_error);
SMC_RET4(handle, status, mbox_error, x1, len_in_resp);
case INTEL_SIP_SMC_FIRMWARE_VERSION:
status = intel_smc_fw_version(&retval);
SMC_RET2(handle, status, retval);