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plat: ti: k3: platform_def.h: Define the correct number of max table entries 

Since we are using static xlat tables, we need to account for exact
count of table entries we are actually using.
peripherals usart, gic, gtc, sec_proxy_rt, scfg and data account for 6 entries
and are constant, however, we also need to account for:
bl31 full range, codebase, ro_data as additional 3 region

With USE_COHERENT_MEM we do add in 1 extra region as well.

This implies that we will have upto 9 or 10 regions based on
USE_COHERENT_MEM usage. Vs we currently define 8 regions.

This gets exposed with DEBUG=1 and assert checks trigger, which for some
reason completely escaped testing previously.

ASSERT: lib/xlat_tables_v2/xlat_tables_core.c:97
BACKTRACE: START: assert

Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I962cdfc779b4eb3b914fe1c46023d50bc289e6bc
This commit is contained in:
Nishanth Menon 2021-03-26 00:34:17 -05:00
parent 2fb5312f61
commit c9f887d8b4
1 changed files with 5 additions and 1 deletions
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6
plat/ti/k3/include/platform_def.h
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@ -60,7 +60,11 @@
* used, choose the smallest value needed to map the required virtual addresses
* for each BL stage.
*/
#define MAX_XLAT_TABLES 8
#if USE_COHERENT_MEM
#define MAX_XLAT_TABLES 10
#else
#define MAX_XLAT_TABLES 9
#endif
/*
* Defines the maximum number of regions that are allocated by the translation