andrius
/
arm-trusted-firmware
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Merge "fix(stm32mp1_clk): fix MCU/AXI parent clock" into integration

This commit is contained in:
Mark Dykes 2021-10-14 22:56:15 +02:00 committed by TrustedFirmware Code Review
parent 34ddd83bc8 b8fe48b6f2
commit d20d5002f9
1 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/st/clk/stm32mp1_clk.c
View File

@ -467,12 +467,12 @@ static const uint8_t fmc_parents[] = {
_ACLK, _PLL3_R, _PLL4_P, _CK_PER
};
static const uint8_t ass_parents[] = {
_HSI, _HSE, _PLL2
static const uint8_t axiss_parents[] = {
_HSI, _HSE, _PLL2_P
};
static const uint8_t mss_parents[] = {
_HSI, _HSE, _CSI, _PLL3
static const uint8_t mcuss_parents[] = {
_HSI, _HSE, _CSI, _PLL3_P
};
static const uint8_t usbphy_parents[] = {
@ -514,8 +514,8 @@ static const struct stm32mp1_clk_sel stm32mp1_clk_sel[_PARENT_SEL_NB] = {
_CLK_PARENT_SEL(SDMMC3, RCC_SDMMC3CKSELR, sdmmc3_parents),
_CLK_PARENT_SEL(QSPI, RCC_QSPICKSELR, qspi_parents),
_CLK_PARENT_SEL(FMC, RCC_FMCCKSELR, fmc_parents),
_CLK_PARENT_SEL(AXIS, RCC_ASSCKSELR, ass_parents),
_CLK_PARENT_SEL(MCUS, RCC_MSSCKSELR, mss_parents),
_CLK_PARENT_SEL(AXIS, RCC_ASSCKSELR, axiss_parents),
_CLK_PARENT_SEL(MCUS, RCC_MSSCKSELR, mcuss_parents),
_CLK_PARENT_SEL(USBPHY, RCC_USBCKSELR, usbphy_parents),
_CLK_PARENT_SEL(USBO, RCC_USBCKSELR, usbo_parents),
};