Fix coding guideline warnings
This patch fixes some coding guideline warnings reported by the checkpatch script. Only files related to upcoming feature development have been fixed. Change-Id: I26fbce75c02ed62f00493ed6c106fe7c863ddbc5
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4c0d039076
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@ -123,10 +123,10 @@ void init_cpu_ops(void);
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#define get_cpu_data_by_index(_ix, _m) _cpu_data_by_index(_ix)->_m
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#define set_cpu_data_by_index(_ix, _m, _v) _cpu_data_by_index(_ix)->_m = _v
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#define flush_cpu_data(_m) flush_dcache_range((uintptr_t) \
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#define flush_cpu_data(_m) flush_dcache_range((uintptr_t) \
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&(_cpu_data()->_m), \
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sizeof(_cpu_data()->_m))
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#define inv_cpu_data(_m) inv_dcache_range((uintptr_t) \
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#define inv_cpu_data(_m) inv_dcache_range((uintptr_t) \
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&(_cpu_data()->_m), \
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sizeof(_cpu_data()->_m))
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#define flush_cpu_data_by_index(_ix, _m) \
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -298,35 +298,35 @@ CASSERT(CTX_EL3STATE_OFFSET == __builtin_offsetof(cpu_context_t, el3state_ctx),
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*/
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#define set_aapcs_args0(ctx, x0) do { \
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write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X0, x0); \
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} while (0);
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} while (0)
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#define set_aapcs_args1(ctx, x0, x1) do { \
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write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X1, x1); \
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set_aapcs_args0(ctx, x0); \
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} while (0);
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} while (0)
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#define set_aapcs_args2(ctx, x0, x1, x2) do { \
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write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X2, x2); \
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set_aapcs_args1(ctx, x0, x1); \
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} while (0);
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} while (0)
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#define set_aapcs_args3(ctx, x0, x1, x2, x3) do { \
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write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X3, x3); \
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set_aapcs_args2(ctx, x0, x1, x2); \
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} while (0);
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} while (0)
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#define set_aapcs_args4(ctx, x0, x1, x2, x3, x4) do { \
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write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X4, x4); \
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set_aapcs_args3(ctx, x0, x1, x2, x3); \
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} while (0);
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} while (0)
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#define set_aapcs_args5(ctx, x0, x1, x2, x3, x4, x5) do { \
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write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X5, x5); \
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set_aapcs_args4(ctx, x0, x1, x2, x3, x4); \
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} while (0);
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} while (0)
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#define set_aapcs_args6(ctx, x0, x1, x2, x3, x4, x5, x6) do { \
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write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X6, x6); \
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set_aapcs_args5(ctx, x0, x1, x2, x3, x4, x5); \
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} while (0);
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} while (0)
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#define set_aapcs_args7(ctx, x0, x1, x2, x3, x4, x5, x6, x7) do { \
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write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X7, x7); \
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set_aapcs_args6(ctx, x0, x1, x2, x3, x4, x5, x6); \
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} while (0);
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} while (0)
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/*******************************************************************************
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* Function prototypes
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@ -119,18 +119,18 @@
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* to SMC handler. These takes the offset values defined in context.h
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*/
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#define SMC_GET_GP(_h, _g) \
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read_ctx_reg(get_gpregs_ctx(_h), (_g));
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read_ctx_reg(get_gpregs_ctx(_h), (_g))
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#define SMC_SET_GP(_h, _g, _v) \
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write_ctx_reg(get_gpregs_ctx(_h), (_g), (_v));
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write_ctx_reg(get_gpregs_ctx(_h), (_g), (_v))
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/*
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* Convenience macros to access EL3 context registers using handle provided to
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* SMC handler. These takes the offset values defined in context.h
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*/
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#define SMC_GET_EL3(_h, _e) \
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read_ctx_reg(get_el3state_ctx(_h), (_e));
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read_ctx_reg(get_el3state_ctx(_h), (_e))
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#define SMC_SET_EL3(_h, _e, _v) \
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write_ctx_reg(get_el3state_ctx(_h), (_e), (_v));
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write_ctx_reg(get_el3state_ctx(_h), (_e), (_v))
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/* The macro below is used to identify a Standard Service SMC call */
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#define is_std_svc_call(_fid) ((((_fid) >> FUNCID_OEN_SHIFT) & \
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@ -817,7 +817,7 @@ void psci_print_power_domain_map(void)
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plat_local_state_type_t state_type;
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/* This array maps to the PSCI_STATE_X definitions in psci.h */
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static const char *psci_state_type_str[] = {
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static const char * const psci_state_type_str[] = {
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"ON",
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"RETENTION",
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"OFF",
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@ -94,7 +94,7 @@ int psci_cpu_suspend(unsigned int power_state,
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is_power_down_state = psci_get_pstate_type(power_state);
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/* Sanity check the requested suspend levels */
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assert (psci_validate_suspend_req(&state_info, is_power_down_state)
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assert(psci_validate_suspend_req(&state_info, is_power_down_state)
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== PSCI_E_SUCCESS);
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target_pwrlvl = psci_find_target_suspend_lvl(&state_info);
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@ -217,7 +217,7 @@ int psci_cpu_off(void)
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* The only error cpu_off can return is E_DENIED. So check if that's
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* indeed the case.
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*/
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assert (rc == PSCI_E_DENIED);
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assert(rc == PSCI_E_DENIED);
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return rc;
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}
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