Merge pull request #520 from vikramkanigiri/vk/scp_flexibility
Vk/scp flexibility
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commit
e45264ab22
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@ -471,6 +471,10 @@ map is explained in the [Firmware Design].
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set to 1 then Trusted Firmware will detect if an earlier version is in use.
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Default is 1.
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* `CSS_LOAD_SCP_IMAGES`: Boolean flag, which when set, adds SCP_BL2 and
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SCP_BL2U to the FIP and FWU_FIP respectively, and enables them to be loaded
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during boot. Default is 1.
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#### ARM FVP platform specific build options
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* `FVP_USE_GIC_DRIVER` : Selects the GIC driver to be built. Options:
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@ -77,25 +77,12 @@
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* SCP <=> AP boot configuration
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*
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* The SCP/AP boot configuration is a 32-bit word located at a known offset from
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* the start of the Trusted SRAM. Part of this configuration is which CPU is the
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* primary, according to the shift and mask definitions below.
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* the start of the Trusted SRAM.
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*
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* Note that the value stored at this address is only valid at boot time, before
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* the SCP_BL2 image is transferred to SCP.
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*/
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#define SCP_BOOT_CFG_ADDR (ARM_TRUSTED_SRAM_BASE + 0x80)
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#define PRIMARY_CPU_SHIFT 8
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#define PRIMARY_CPU_BIT_WIDTH 4
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/*
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* Base address of the first memory region used for communication between AP
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* and SCP. Used by the BOM and SCPI protocols.
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*
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* Note that this is located at the same address as SCP_BOOT_CFG_ADDR, which
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* means the SCP/AP configuration data gets overwritten when the AP initiates
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* communication with the SCP.
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*/
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#define SCP_COM_SHARED_MEM_BASE (ARM_TRUSTED_SRAM_BASE + 0x80)
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#define SCP_BOOT_CFG_ADDR PLAT_CSS_SCP_COM_SHARED_MEM_BASE
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#define CSS_MAP_DEVICE MAP_REGION_FLAT( \
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CSS_DEVICE_BASE, \
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@ -137,6 +124,13 @@
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* ARM Compute SubSystems (CSS)
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************************************************************************/
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/*
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* The loading of SCP images(SCP_BL2 or SCP_BL2U) is done if there
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* respective base addresses are defined (i.e SCP_BL2_BASE, SCP_BL2U_BASE).
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* Hence, `CSS_LOAD_SCP_IMAGES` needs to be set to 1 if BL2 needs to load
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* an SCP_BL2/SCP_BL2U image.
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*/
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#if CSS_LOAD_SCP_IMAGES
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/*
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* Load address of SCP_BL2 in CSS platform ports
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* SCP_BL2 is loaded to the same place as BL31. Once SCP_BL2 is transferred to the
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@ -145,6 +139,7 @@
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#define SCP_BL2_BASE BL31_BASE
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#define SCP_BL2U_BASE BL31_BASE
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#endif /* CSS_LOAD_SCP_IMAGES */
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#define PLAT_ARM_SHARED_RAM_CACHED MHU_PAYLOAD_CACHED
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@ -106,6 +106,20 @@
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/* MHU related constants */
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#define PLAT_CSS_MHU_BASE 0x2b1f0000
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/*
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* Base address of the first memory region used for communication between AP
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* and SCP. Used by the BOM and SCPI protocols.
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*
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* Note that this is located at the same address as SCP_BOOT_CFG_ADDR, which
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* means the SCP/AP configuration data gets overwritten when the AP initiates
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* communication with the SCP. The configuration data is expected to be a
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* 32-bit word on all CSS platforms. On Juno, part of this configuration is
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* which CPU is the primary, according to the shift and mask definitions below.
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*/
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#define PLAT_CSS_SCP_COM_SHARED_MEM_BASE (ARM_TRUSTED_SRAM_BASE + 0x80)
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#define PLAT_CSS_PRIMARY_CPU_SHIFT 8
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#define PLAT_CSS_PRIMARY_CPU_BIT_WIDTH 4
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/*
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* Define a list of Group 1 Secure and Group 0 interrupts as per GICv3
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* terminology. On a GICv2 system or mode, the lists will be merged and treated
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -117,7 +117,8 @@ func plat_is_my_cpu_primary
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bl plat_my_core_pos
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ldr x1, =SCP_BOOT_CFG_ADDR
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ldr x1, [x1]
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ubfx x1, x1, #PRIMARY_CPU_SHIFT, #PRIMARY_CPU_BIT_WIDTH
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ubfx x1, x1, #PLAT_CSS_PRIMARY_CPU_SHIFT, \
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#PLAT_CSS_PRIMARY_CPU_BIT_WIDTH
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cmp x0, x1
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cset w0, eq
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ret x9
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@ -1,5 +1,5 @@
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#
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# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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@ -28,6 +28,10 @@
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# POSSIBILITY OF SUCH DAMAGE.
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#
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# By default, SCP images are needed by CSS platforms.
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CSS_LOAD_SCP_IMAGES ?= 1
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PLAT_INCLUDES += -Iinclude/plat/arm/css/common \
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-Iinclude/plat/arm/css/common/aarch64
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@ -38,12 +42,10 @@ BL1_SOURCES += plat/arm/css/common/css_bl1_setup.c
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BL2_SOURCES += plat/arm/css/common/css_bl2_setup.c \
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plat/arm/css/common/css_mhu.c \
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plat/arm/css/common/css_scp_bootloader.c \
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plat/arm/css/common/css_scpi.c
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BL2U_SOURCES += plat/arm/css/common/css_bl2u_setup.c \
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plat/arm/css/common/css_mhu.c \
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plat/arm/css/common/css_scp_bootloader.c \
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plat/arm/css/common/css_scpi.c
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BL31_SOURCES += plat/arm/css/common/css_mhu.c \
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@ -51,17 +53,25 @@ BL31_SOURCES += plat/arm/css/common/css_mhu.c \
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plat/arm/css/common/css_scpi.c \
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plat/arm/css/common/css_topology.c
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ifneq (${TRUSTED_BOARD_BOOT},0)
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$(eval $(call FWU_FIP_ADD_IMG,SCP_BL2U,--scp-fwu-cfg))
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endif
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ifneq (${RESET_TO_BL31},0)
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$(error "Using BL31 as the reset vector is not supported on CSS platforms. \
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Please set RESET_TO_BL31 to 0.")
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endif
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# Subsystems require a SCP_BL2 image
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# Process CSS_LOAD_SCP_IMAGES flag
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$(eval $(call assert_boolean,CSS_LOAD_SCP_IMAGES))
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$(eval $(call add_define,CSS_LOAD_SCP_IMAGES))
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ifeq (${CSS_LOAD_SCP_IMAGES},1)
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$(eval $(call FIP_ADD_IMG,SCP_BL2,--scp-fw))
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ifneq (${TRUSTED_BOARD_BOOT},0)
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$(eval $(call FWU_FIP_ADD_IMG,SCP_BL2U,--scp-fwu-cfg))
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endif
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BL2U_SOURCES += plat/arm/css/common/css_scp_bootloader.c
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BL2_SOURCES += plat/arm/css/common/css_scp_bootloader.c
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endif
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# Enable option to detect whether the SCP ROM firmware in use predates version
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# 1.7.0 and therefore, is incompatible.
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -60,7 +60,7 @@ typedef struct {
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* Unlike the SCPI protocol, the boot protocol uses the same memory region
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* for both AP -> SCP and SCP -> AP transfers; define the address of this...
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*/
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#define BOM_SHARED_MEM SCP_COM_SHARED_MEM_BASE
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#define BOM_SHARED_MEM PLAT_CSS_SCP_COM_SHARED_MEM_BASE
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#define BOM_CMD_HEADER ((bom_cmd_t *) BOM_SHARED_MEM)
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#define BOM_CMD_PAYLOAD ((void *) (BOM_SHARED_MEM + sizeof(bom_cmd_t)))
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -37,8 +37,9 @@
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#include "css_mhu.h"
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#include "css_scpi.h"
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#define SCPI_SHARED_MEM_SCP_TO_AP SCP_COM_SHARED_MEM_BASE
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#define SCPI_SHARED_MEM_AP_TO_SCP (SCP_COM_SHARED_MEM_BASE + 0x100)
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#define SCPI_SHARED_MEM_SCP_TO_AP PLAT_CSS_SCP_COM_SHARED_MEM_BASE
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#define SCPI_SHARED_MEM_AP_TO_SCP (PLAT_CSS_SCP_COM_SHARED_MEM_BASE \
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+ 0x100)
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#define SCPI_CMD_HEADER_AP_TO_SCP \
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((scpi_cmd_t *) SCPI_SHARED_MEM_AP_TO_SCP)
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