Merge "Add Makalu ELP CPU lib" into integration
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/*
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* Copyright (c) 2021, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef CORTEX_MAKALU_ELP_H
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#define CORTEX_MAKALU_ELP_H
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#define CORTEX_MAKALU_ELP_MIDR U(0x410FD4E0)
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/*******************************************************************************
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* CPU Extended Control register specific definitions
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******************************************************************************/
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#define CORTEX_MAKALU_ELP_CPUECTLR_EL1 S3_0_C15_C1_4
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/*******************************************************************************
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* CPU Power Control register specific definitions
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******************************************************************************/
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#define CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1 S3_0_C15_C2_7
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#define CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
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#endif /* CORTEX_MAKALU_ELP_H */
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/*
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* Copyright (c) 2021, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <common/bl_common.h>
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#include <cortex_makalu_elp.h>
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#include <cpu_macros.S>
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#include <plat_macros.S>
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/* Hardware handled coherency */
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#if HW_ASSISTED_COHERENCY == 0
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#error "Cortex Makalu ELP must be compiled with HW_ASSISTED_COHERENCY enabled"
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#endif
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/* 64-bit only core */
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#if CTX_INCLUDE_AARCH32_REGS == 1
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#error "Cortex Makalu ELP supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
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#endif
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/* ----------------------------------------------------
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* HW will do the cache maintenance while powering down
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* ----------------------------------------------------
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*/
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func cortex_makalu_elp_core_pwr_dwn
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/* ---------------------------------------------------
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* Enable CPU power down bit in power control register
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* ---------------------------------------------------
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*/
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mrs x0, CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1
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orr x0, x0, #CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
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msr CORTEX_MAKALU_ELP_CPUPWRCTLR_EL1, x0
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isb
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ret
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endfunc cortex_makalu_elp_core_pwr_dwn
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#if REPORT_ERRATA
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/*
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* Errata printing function for Cortex Makalu ELP. Must follow AAPCS.
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*/
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func cortex_makalu_elp_errata_report
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ret
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endfunc cortex_makalu_elp_errata_report
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#endif
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func cortex_makalu_elp_reset_func
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/* Disable speculative loads */
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msr SSBS, xzr
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isb
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ret
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endfunc cortex_makalu_elp_reset_func
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/* ---------------------------------------------
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* This function provides Cortex Makalu ELP-
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* specific register information for crash
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* reporting. It needs to return with x6
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* pointing to a list of register names in ascii
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* and x8 - x15 having values of registers to be
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* reported.
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* ---------------------------------------------
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*/
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.section .rodata.cortex_makalu_elp_regs, "aS"
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cortex_makalu_elp_regs: /* The ascii list of register names to be reported */
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.asciz "cpuectlr_el1", ""
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func cortex_makalu_elp_cpu_reg_dump
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adr x6, cortex_makalu_elp_regs
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mrs x8, CORTEX_MAKALU_ELP_CPUECTLR_EL1
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ret
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endfunc cortex_makalu_elp_cpu_reg_dump
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declare_cpu_ops cortex_makalu_elp, CORTEX_MAKALU_ELP_MIDR, \
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cortex_makalu_elp_reset_func, \
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cortex_makalu_elp_core_pwr_dwn
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@ -69,7 +69,8 @@ else
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lib/cpus/aarch64/cortex_a65ae.S \
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lib/cpus/aarch64/cortex_a65ae.S \
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lib/cpus/aarch64/cortex_klein.S \
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lib/cpus/aarch64/cortex_klein.S \
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lib/cpus/aarch64/cortex_matterhorn.S \
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lib/cpus/aarch64/cortex_matterhorn.S \
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lib/cpus/aarch64/cortex_makalu.S
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lib/cpus/aarch64/cortex_makalu.S \
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lib/cpus/aarch64/cortex_makalu_elp.S
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# AArch64/AArch32 cores
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# AArch64/AArch32 cores
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FPGA_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
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FPGA_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
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@ -131,9 +131,10 @@ else
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lib/cpus/aarch64/neoverse_e1.S \
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lib/cpus/aarch64/neoverse_e1.S \
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lib/cpus/aarch64/neoverse_v1.S \
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lib/cpus/aarch64/neoverse_v1.S \
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lib/cpus/aarch64/cortex_a78_ae.S \
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lib/cpus/aarch64/cortex_a78_ae.S \
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lib/cpus/aarch64/cortex_klein.S \
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lib/cpus/aarch64/cortex_klein.S \
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lib/cpus/aarch64/cortex_matterhorn.S \
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lib/cpus/aarch64/cortex_matterhorn.S \
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lib/cpus/aarch64/cortex_makalu.S \
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lib/cpus/aarch64/cortex_makalu.S \
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lib/cpus/aarch64/cortex_makalu_elp.S \
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lib/cpus/aarch64/cortex_a65.S \
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lib/cpus/aarch64/cortex_a65.S \
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lib/cpus/aarch64/cortex_a65ae.S
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lib/cpus/aarch64/cortex_a65ae.S
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endif
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endif
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