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Merge changes Id7bdbc9b,Ia813e051,I2c437380,I736724cc,I454fb40a, ... into integration 

* changes:
  renesas: rzg: Add support to identify EK874 RZ/G2E board
  drivers: renesas: common: watchdog: Add support for RZ/G2E
  drivers: renesas: rzg: Add QoS support for RZ/G2E
  drivers: renesas: rzg: Add PFC support for RZ/G2E
  drivers: renesas: common: Add support for DRAM initialization on RZ/G2E SoC
  renesas: rzg: Add support to identify HopeRun HiHope RZ/G2N board
  drivers: renesas: common: emmc: Select eMMC channel for RZ/G2N SoC
  drivers: renesas: rzg: Add QoS support for RZ/G2N
  drivers: renesas: rzg: Add PFC support for RZ/G2N
  drivers: renesas: common: Add support for DRAM initialization on RZ/G2N SoC
  renesas: rzg: Add support to identify HopeRun HiHope RZ/G2H board
  drivers: renesas: common: emmc: Select eMMC channel for RZ/G2H SoC
  drivers: renesas: rzg: Add QoS support for RZ/G2H
  drivers: renesas: rzg: Add PFC support for RZ/G2H
  drivers: renesas: common: Add support for DRAM initialization on RZ/G2H SoC
  drivers: renesas: rzg: Switch using common ddr code
  drivers: renesas: ddr: Move to common
This commit is contained in:
Manish Pandey 2021-04-21 17:08:46 +02:00 committed by TrustedFirmware Code Review
parent d8dc8c9e2e bcf43f0486
commit e9cd36f569
67 changed files with 7147 additions and 10570 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

0
drivers/renesas/rcar/ddr/boot_init_dram.h → drivers/renesas/common/ddr/boot_init_dram.h
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17
drivers/renesas/common/ddr/ddr.mk Normal file
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@ -0,0 +1,17 @@
#
# Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
ifeq ($(RCAR_LSI),$(filter $(RCAR_LSI),${RCAR_E3} ${RZ_G2E}))
include drivers/renesas/common/ddr/ddr_a/ddr_a.mk
BL2_SOURCES += drivers/renesas/common/ddr/dram_sub_func.c
else ifeq (${RCAR_LSI},${RCAR_D3})
include drivers/renesas/common/ddr/ddr_a/ddr_a.mk
else ifeq (${RCAR_LSI},${RCAR_V3M})
include drivers/renesas/common/ddr/ddr_a/ddr_a.mk
else
include drivers/renesas/common/ddr/ddr_b/ddr_b.mk
BL2_SOURCES += drivers/renesas/common/ddr/dram_sub_func.c
endif

0
drivers/renesas/rcar/ddr/ddr_a/boot_init_dram_regdef.h → drivers/renesas/common/ddr/ddr_a/boot_init_dram_regdef.h
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13
drivers/renesas/common/ddr/ddr_a/ddr_a.mk Normal file
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@ -0,0 +1,13 @@
#
# Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
ifeq ($(RCAR_LSI),$(filter $(RCAR_LSI),${RCAR_E3} ${RZ_G2E}))
BL2_SOURCES += drivers/renesas/common/ddr/ddr_a/ddr_init_e3.c
else ifeq (${RCAR_LSI},${RCAR_D3})
BL2_SOURCES += drivers/renesas/common/ddr/ddr_a/ddr_init_d3.c
else
BL2_SOURCES += drivers/renesas/common/ddr/ddr_a/ddr_init_v3m.c
endif

0
drivers/renesas/rcar/ddr/ddr_a/ddr_init_d3.c → drivers/renesas/common/ddr/ddr_a/ddr_init_d3.c
View File

0
drivers/renesas/rcar/ddr/ddr_a/ddr_init_e3.c → drivers/renesas/common/ddr/ddr_a/ddr_init_e3.c
View File

0
drivers/renesas/rcar/ddr/ddr_a/ddr_init_v3m.c → drivers/renesas/common/ddr/ddr_a/ddr_init_v3m.c
View File

12
drivers/renesas/rcar/ddr/ddr_b/boot_init_dram.c → drivers/renesas/common/ddr/ddr_b/boot_init_dram.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2020, Renesas Electronics Corporation.
* Copyright (c) 2015-2021, Renesas Electronics Corporation.
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -36,6 +36,10 @@
#define RCAR_E3 3 /* NON */
#define RCAR_H3N 4
#define RZ_G2M 100U
#define RZ_G2H 101U
#define RZ_G2N 102U
#define RCAR_CUT_10 0
#define RCAR_CUT_11 1
#define RCAR_CUT_20 10
@ -51,11 +55,11 @@ static uint32_t prr_cut;
#else
#if (RCAR_LSI == RCAR_H3)
static const uint32_t prr_product = PRR_PRODUCT_H3;
#elif(RCAR_LSI == RCAR_M3)
#elif(RCAR_LSI == RCAR_M3 || RCAR_LSI == RZ_G2M)
static const uint32_t prr_product = PRR_PRODUCT_M3;
#elif(RCAR_LSI == RCAR_M3N)
#elif(RCAR_LSI == RCAR_M3N || RCAR_LSI == RZ_G2N)
static const uint32_t prr_product = PRR_PRODUCT_M3N;
#elif(RCAR_LSI == RCAR_H3N)
#elif(RCAR_LSI == RCAR_H3N || RCAR_LSI == RZ_G2H)
static const uint32_t prr_product = PRR_PRODUCT_H3;
#endif /* RCAR_LSI */

269
drivers/renesas/rcar/ddr/ddr_b/boot_init_dram_config.c → drivers/renesas/common/ddr/ddr_b/boot_init_dram_config.c
View File

@ -1,11 +1,19 @@
/*
* Copyright (c) 2015-2020, Renesas Electronics Corporation.
* Copyright (c) 2015-2021, Renesas Electronics Corporation.
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef RZG_SOC
#define RZG_SOC 0
#endif
#if (RZG_SOC == 1)
#define BOARDNUM 4
#else
#define BOARDNUM 22
#endif /* RZG_SOC == 1 */
#define BOARD_JUDGE_AUTO
#ifdef BOARD_JUDGE_AUTO
@ -66,6 +74,225 @@ struct _boardcnf {
0x000F,\
0x010F}
#if (RZG_SOC == 1)
static const struct _boardcnf boardcnfs[BOARDNUM] = {
{
/* boardcnf[0] HopeRun HiHope RZ/G2M 16Gbit/1rank/2ch board with G2M SoC */
.phyvalid = 0x03U,
.dbi_en = 0x01U,
.cacs_dly = 0x02c0U,
.cacs_dly_adj = 0x0U,
.dqdm_dly_w = 0x0300U,
.dqdm_dly_r = 0x00a0U,
.ch = {
{
{ 0x04U, 0xffU },
0x00345201UL,
0x3201U,
{ 0x01672543U, 0x45361207U, 0x45632107U, 0x60715234U },
{ 0x08U, 0x08U, 0x08U, 0x08U },
WDQLVL_PAT,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 }
},
{
{ 0x04U, 0xffU },
0x00302154UL,
0x2310U,
{ 0x01672543U, 0x45361207U, 0x45632107U, 0x60715234U },
{ 0x08U, 0x08U, 0x08U, 0x08U },
WDQLVL_PAT,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 }
}
}
},
/* boardcnf[1] HopeRun HiHope RZ/G2M 8Gbit/2rank/2ch board with G2M SoC */
{
0x03U,
0x01U,
0x02c0U,
0x0U,
0x0300U,
0x00a0U,
{
{
{ 0x02U, 0x02U },
0x00345201UL,
0x3201U,
{ 0x01672543U, 0x45361207U, 0x45632107U, 0x60715234U },
{ 0x08U, 0x08U, 0x08U, 0x08U },
WDQLVL_PAT,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 }
},
{
{ 0x02U, 0x02U },
0x00302154UL,
0x2310,
{ 0x01672543U, 0x45361207U, 0x45632107U, 0x60715234U },
{ 0x08U, 0x08U, 0x08U, 0x08U },
WDQLVL_PAT,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 }
}
}
},
/* boardcnf[2] HopeRun HiHope RZ/G2H board 16Gbit/1rank/2ch */
{
0x05U,
0x01U,
0x0300U,
0,
0x0300U,
0x00a0U,
{
{
{ 0x04U, 0xffU },
0x00345201UL,
0x3201U,
{ 0x01672543U, 0x45367012U, 0x45632107U, 0x60715234U },
{ 0x08U, 0x08U, 0x08U, 0x08U },
WDQLVL_PAT,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 }
},
{
{ 0x04U, 0xffU },
0x00302154UL,
0x2310U,
{ 0x01672543U, 0x45361207U, 0x45632107U, 0x60715234U },
{ 0x08U, 0x08U, 0x08U, 0x08U },
WDQLVL_PAT,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 }
},
{
{ 0x04U, 0xffU },
0x00302154UL,
0x2310U,
{ 0x01672543U, 0x45361207U, 0x45632107U, 0x60715234U },
{ 0x08U, 0x08U, 0x08U, 0x08U },
WDQLVL_PAT,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 }
},
{
{ 0xffU, 0xffU },
0UL,
0U,
{ 0U, 0U, 0U, 0U },
{ 0U, 0U, 0U, 0U },
WDQLVL_PAT,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 }
}
}
},
/* boardcnf[3] HopeRun HiHope RZ/G2N board 16Gbit/2rank/1ch */
{
0x01U,
0x01U,
0x0300U,
0,
0x0300U,
0x00a0U,
{
{
{ 0x04U, 0x04U },
0x00345201UL,
0x3201U,
{ 0x01672543U, 0x45361207U, 0x45632107U, 0x60715234U },
{ 0x08U, 0x08U, 0x08U, 0x08U },
WDQLVL_PAT,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 }
}
}
},
};
#else
static const struct _boardcnf boardcnfs[BOARDNUM] = {
{
/* boardcnf[0] RENESAS SALVATOR-X board with M3-W/SIP */
@ -1535,6 +1762,7 @@ static const struct _boardcnf boardcnfs[BOARDNUM] = {
}
}
};
#endif /* RZG_SOC == 1 */
void boardcnf_get_brd_clk(uint32_t brd, uint32_t *clk, uint32_t *div)
{
@ -1636,7 +1864,7 @@ static const uint32_t termcode_by_sample[20][3] = {
#define GPIO_INDT5 0xE605500CU
#define GPIO_GPSR6 0xE6060118U
#if (RCAR_GEN3_ULCB == 0)
#if (RCAR_GEN3_ULCB == 0) && (RZG_SOC == 0)
static void pfc_write_and_poll(uint32_t a, uint32_t v)
{
mmio_write_32(PFC_PMMR, ~v);
@ -1652,7 +1880,7 @@ static void pfc_write_and_poll(uint32_t a, uint32_t v)
#define RCAR_GEN3_ULCB 0
#endif
#if (RCAR_GEN3_ULCB == 0) /* non Starter Kit */
#if (RCAR_GEN3_ULCB == 0) && (RZG_SOC == 0) /* non Starter Kit */
static uint32_t opencheck_SSI_WS6(void)
{
@ -1709,9 +1937,43 @@ static uint32_t opencheck_SSI_WS6(void)
#endif
#if (RZG_SOC == 1)
#define LPDDR4_2RANK (0x01U << 25U)
static uint32_t rzg2_board_judge(void)
{
uint32_t brd;
switch (prr_product) {
case PRR_PRODUCT_M3:
brd = 1U;
if ((mmio_read_32(PRR) & PRR_CUT_MASK) != RCAR_M3_CUT_VER11) {
if ((mmio_read_32(GPIO_INDT5) & LPDDR4_2RANK) == 0U) {
brd = 0U;
}
}
break;
case PRR_PRODUCT_H3:
brd = 2U;
break;
case PRR_PRODUCT_M3N:
brd = 3U;
break;
default:
brd = 99U;
}
return brd;
}
#endif /* RZG_SOC == 1 */
static uint32_t _board_judge(void)
{
uint32_t brd;
#if (RZG_SOC == 1)
brd = rzg2_board_judge();
#else
#if (RCAR_GEN3_ULCB == 1)
/* Starter Kit */
if (prr_product == PRR_PRODUCT_H3) {
@ -1798,6 +2060,7 @@ static uint32_t _board_judge(void)
}
}
#endif
#endif /* RZG_SOC == 1 */
return brd;
}

0
drivers/renesas/rcar/ddr/ddr_b/boot_init_dram_regdef.h → drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h
View File

7
drivers/renesas/common/ddr/ddr_b/ddr_b.mk Normal file
View File

@ -0,0 +1,7 @@
#
# Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
BL2_SOURCES += drivers/renesas/common/ddr/ddr_b/boot_init_dram.c

0
drivers/renesas/rcar/ddr/ddr_b/ddr_regdef.h → drivers/renesas/common/ddr/ddr_b/ddr_regdef.h
View File

0
drivers/renesas/rcar/ddr/ddr_b/init_dram_tbl_h3.h → drivers/renesas/common/ddr/ddr_b/init_dram_tbl_h3.h
View File

0
drivers/renesas/rcar/ddr/ddr_b/init_dram_tbl_h3ver2.h → drivers/renesas/common/ddr/ddr_b/init_dram_tbl_h3ver2.h
View File

0
drivers/renesas/rcar/ddr/ddr_b/init_dram_tbl_m3.h → drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3.h
View File

0
drivers/renesas/rcar/ddr/ddr_b/init_dram_tbl_m3n.h → drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3n.h
View File

0
drivers/renesas/rcar/ddr/dram_sub_func.c → drivers/renesas/common/ddr/dram_sub_func.c
View File

0
drivers/renesas/rcar/ddr/dram_sub_func.h → drivers/renesas/common/ddr/dram_sub_func.h
View File

8
drivers/renesas/common/emmc/emmc_registers.h
View File

@ -11,11 +11,11 @@
#define MMC_CH0 (0U) /* SDHI2/MMC0 */
#define MMC_CH1 (1U) /* SDHI3/MMC1 */
#if (RCAR_LSI == RCAR_E3) || (RCAR_LSI == RZ_G2M)
#define USE_MMC_CH (MMC_CH1) /* R-Car E3 or RZ/G2M */
#else /* RCAR_LSI == RCAR_E3 || RCAR_LSI == RZ_G2M */
#if (RCAR_LSI == RCAR_E3) || (RCAR_LSI == RZ_G2M) || (RCAR_LSI == RZ_G2H) || (RCAR_LSI == RZ_G2N)
#define USE_MMC_CH (MMC_CH1) /* R-Car E3 or RZ/G2{H,M,N} */
#else /* RCAR_LSI == RCAR_E3 || RCAR_LSI == RZ_G2{H,M,N} */
#define USE_MMC_CH (MMC_CH0) /* R-Car H3/M3/M3N */
#endif /* RCAR_LSI == RCAR_E3 || RCAR_LSI == RZ_G2M */
#endif /* RCAR_LSI == RCAR_E3 || RCAR_LSI == RZ_G2{H,M,N} */
#define BIT0 (0x00000001U)
#define BIT1 (0x00000002U)

4
drivers/renesas/common/watchdog/swdt.c
View File

@ -78,7 +78,7 @@ static void swdt_disable(void)
void rcar_swdt_init(void)
{
uint32_t rmsk, sr;
#if (RCAR_LSI != RCAR_E3)
#if (RCAR_LSI != RCAR_E3) && (RCAR_LSI != RZ_G2E)
uint32_t reg, val, product_cut, chk_data;
reg = mmio_read_32(RCAR_PRR);
@ -94,7 +94,7 @@ void rcar_swdt_init(void)
mmio_write_32(SWDT_WTCSRA, WTCSRA_UPPER_BYTE |
WTCSRA_WOVFE | WTCSRA_CKS_DIV16);
#if (RCAR_LSI == RCAR_E3)
#if (RCAR_LSI == RCAR_E3) || (RCAR_LSI == RZ_G2E)
mmio_write_32(SWDT_WTCNT, WTCNT_UPPER_BYTE | WTCNT_COUNT_7p81k);
#else
val = WTCNT_UPPER_BYTE;

17
drivers/renesas/rcar/ddr/ddr.mk
View File

@ -1,17 +0,0 @@
#
# Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
ifeq (${RCAR_LSI},${RCAR_E3})
include drivers/renesas/rcar/ddr/ddr_a/ddr_a.mk
BL2_SOURCES += drivers/renesas/rcar/ddr/dram_sub_func.c
else ifeq (${RCAR_LSI},${RCAR_D3})
include drivers/renesas/rcar/ddr/ddr_a/ddr_a.mk
else ifeq (${RCAR_LSI},${RCAR_V3M})
include drivers/renesas/rcar/ddr/ddr_a/ddr_a.mk
else
include drivers/renesas/rcar/ddr/ddr_b/ddr_b.mk
BL2_SOURCES += drivers/renesas/rcar/ddr/dram_sub_func.c
endif

13
drivers/renesas/rcar/ddr/ddr_a/ddr_a.mk
View File

@ -1,13 +0,0 @@
#
# Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
ifeq (${RCAR_LSI},${RCAR_E3})
BL2_SOURCES += drivers/renesas/rcar/ddr/ddr_a/ddr_init_e3.c
else ifeq (${RCAR_LSI},${RCAR_D3})
BL2_SOURCES += drivers/renesas/rcar/ddr/ddr_a/ddr_init_d3.c
else
BL2_SOURCES += drivers/renesas/rcar/ddr/ddr_a/ddr_init_v3m.c
endif

7
drivers/renesas/rcar/ddr/ddr_b/ddr_b.mk
View File

@ -1,7 +0,0 @@
#
# Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
BL2_SOURCES += drivers/renesas/rcar/ddr/ddr_b/boot_init_dram.c

45
drivers/renesas/rzg/board/board.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2020, Renesas Electronics Corporation. All rights reserved.
* Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -13,7 +13,15 @@
#include "rcar_def.h"
#ifndef BOARD_DEFAULT
#if (RCAR_LSI == RZ_G2H)
#define BOARD_DEFAULT (BOARD_HIHOPE_RZ_G2H << BOARD_CODE_SHIFT)
#elif (RCAR_LSI == RZ_G2N)
#define BOARD_DEFAULT (BOARD_HIHOPE_RZ_G2N << BOARD_CODE_SHIFT)
#elif (RCAR_LSI == RZ_G2E)
#define BOARD_DEFAULT (BOARD_EK874_RZ_G2E << BOARD_CODE_SHIFT)
#else
#define BOARD_DEFAULT (BOARD_HIHOPE_RZ_G2M << BOARD_CODE_SHIFT)
#endif /* RCAR_LSI == RZ_G2H */
#endif /* BOARD_DEFAULT */
#define BOARD_CODE_MASK (0xF8U)
@ -27,9 +35,15 @@
#define GP5_25_BIT (0x01U << 25)
#define HM_ID { 0x10U, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU }
#define HH_ID HM_ID
#define HN_ID { 0x20U, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU }
#define EK_ID HM_ID
const char *g_board_tbl[] = {
[BOARD_HIHOPE_RZ_G2M] = "HiHope RZ/G2M",
[BOARD_HIHOPE_RZ_G2H] = "HiHope RZ/G2H",
[BOARD_HIHOPE_RZ_G2N] = "HiHope RZ/G2N",
[BOARD_EK874_RZ_G2E] = "EK874 RZ/G2E",
[BOARD_UNKNOWN] = "unknown"
};
@ -38,8 +52,14 @@ void rzg_get_board_type(uint32_t *type, uint32_t *rev)
static uint8_t board_id = BOARD_ID_UNKNOWN;
const uint8_t board_tbl[][8] = {
[BOARD_HIHOPE_RZ_G2M] = HM_ID,
[BOARD_HIHOPE_RZ_G2H] = HH_ID,
[BOARD_HIHOPE_RZ_G2N] = HN_ID,
[BOARD_EK874_RZ_G2E] = EK_ID,
};
uint32_t reg, boardInfo;
uint32_t reg;
#if (RCAR_LSI != RZ_G2E)
uint32_t boardInfo;
#endif /* RCAR_LSI == RZ_G2E */
if (board_id == BOARD_ID_UNKNOWN) {
board_id = BOARD_DEFAULT;
@ -50,15 +70,28 @@ void rzg_get_board_type(uint32_t *type, uint32_t *rev)
if (*type >= ARRAY_SIZE(board_tbl)) {
/* no revision information, set Rev0.0. */
*rev = 0;
return;
}
reg = mmio_read_32(RCAR_PRR);
#if (RCAR_LSI == RZ_G2E)
if (reg & RCAR_MINOR_MASK) {
*rev = 0x30U;
} else {
reg = mmio_read_32(RCAR_PRR);
if ((reg & PRR_CUT_MASK) == RCAR_M3_CUT_VER11) {
*rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)];
}
#else
if ((reg & PRR_CUT_MASK) == RCAR_M3_CUT_VER11) {
*rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)];
} else {
reg = mmio_read_32(GPIO_INDT5);
if (reg & GP5_25_BIT) {
*rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)];
} else {
boardInfo = mmio_read_32(GPIO_INDT5) &
(GP5_19_BIT | GP5_21_BIT);
boardInfo = reg & (GP5_19_BIT | GP5_21_BIT);
*rev = (((boardInfo & GP5_19_BIT) >> 14) |
((boardInfo & GP5_21_BIT) >> 17)) + 0x30U;
}
}
#endif /* RCAR_LSI == RZ_G2E */
}

5
drivers/renesas/rzg/board/board.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2020, Renesas Electronics Corporation. All rights reserved.
* Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -9,6 +9,9 @@
enum rzg2_board_id {
BOARD_HIHOPE_RZ_G2M = 0,
BOARD_HIHOPE_RZ_G2H,
BOARD_HIHOPE_RZ_G2N,
BOARD_EK874_RZ_G2E,
BOARD_UNKNOWN
};

18
drivers/renesas/rzg/ddr/boot_init_dram.h
View File

@ -1,18 +0,0 @@
/*
* Copyright (c) 2020, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef BOOT_INIT_DRAM_H
#define BOOT_INIT_DRAM_H
extern int32_t rzg_dram_init(void);
#define INITDRAM_OK 0
#define INITDRAM_NG 0xffffffff
#define INITDRAM_ERR_I 0xffffffff
#define INITDRAM_ERR_O 0xfffffffe
#define INITDRAM_ERR_T 0xfffffff0
#endif /* BOOT_INIT_DRAM_H */

7
drivers/renesas/rzg/ddr/ddr.mk
View File

@ -1,7 +0,0 @@
#
# Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
include drivers/renesas/rzg/ddr/ddr_b/ddr_b.mk

3700
drivers/renesas/rzg/ddr/ddr_b/boot_init_dram.c
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File diff suppressed because it is too large Load Diff

277
drivers/renesas/rzg/ddr/ddr_b/boot_init_dram_config.c
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@ -1,277 +0,0 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#define BOARDNUM 2
#define BOARD_JUDGE_AUTO
#ifdef BOARD_JUDGE_AUTO
static uint32_t _board_judge(uint32_t prr_product);
static uint32_t boardcnf_get_brd_type(uint32_t prr_product)
{
return _board_judge(prr_product);
}
#else /* BOARD_JUDGE_AUTO */
static uint32_t boardcnf_get_brd_type(void)
{
return 1U;
}
#endif /* BOARD_JUDGE_AUTO */
#define DDR_FAST_INIT
struct _boardcnf_ch {
uint8_t ddr_density[CS_CNT];
uint64_t ca_swap;
uint16_t dqs_swap;
uint32_t dq_swap[SLICE_CNT];
uint8_t dm_swap[SLICE_CNT];
uint16_t wdqlvl_patt[16];
int8_t cacs_adj[16];
int8_t dm_adj_w[SLICE_CNT];
int8_t dq_adj_w[SLICE_CNT * 8U];
int8_t dm_adj_r[SLICE_CNT];
int8_t dq_adj_r[SLICE_CNT * 8U];
};
struct _boardcnf {
uint8_t phyvalid;
uint8_t dbi_en;
uint16_t cacs_dly;
int16_t cacs_dly_adj;
uint16_t dqdm_dly_w;
uint16_t dqdm_dly_r;
struct _boardcnf_ch ch[DRAM_CH_CNT];
};
#define WDQLVL_PAT {\
0x00AA,\
0x0055,\
0x00AA,\
0x0155,\
0x01CC,\
0x0133,\
0x00CC,\
0x0033,\
0x00F0,\
0x010F,\
0x01F0,\
0x010F,\
0x00F0,\
0x00F0,\
0x000F,\
0x010F}
static const struct _boardcnf boardcnfs[BOARDNUM] = {
{
/* boardcnf[0] HopeRun HiHope RZ/G2M 16Gbit/1rank/2ch board with G2M SoC */
.phyvalid = 0x03,
.dbi_en = 0x01,
.cacs_dly = 0x02c0,
.cacs_dly_adj = 0,
.dqdm_dly_w = 0x0300,
.dqdm_dly_r = 0x00a0,
.ch = {
{
{0x04, 0xff},
0x00345201U,
0x3201,
{0x01672543U, 0x45361207U, 0x45632107U, 0x60715234U},
{0x08, 0x08, 0x08, 0x08},
WDQLVL_PAT,
{0, 0, 0, 0, 0, 0, 0, 0,
0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0}
},
{
{0x04, 0xff},
0x00302154U,
0x2310,
{0x01672543U, 0x45361207U, 0x45632107U, 0x60715234U},
{0x08, 0x08, 0x08, 0x08},
WDQLVL_PAT,
{0, 0, 0, 0, 0, 0, 0, 0,
0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0}
}
}
},
/* boardcnf[1] HopeRun HiHope RZ/G2M 8Gbit/2rank/2ch board with G2M SoC */
{
0x03,
0x01,
0x02c0,
0,
0x0300,
0x00a0,
{
{
{0x02, 0x02},
0x00345201U,
0x3201,
{0x01672543U, 0x45361207U, 0x45632107U, 0x60715234U},
{0x08, 0x08, 0x08, 0x08},
WDQLVL_PAT,
{0, 0, 0, 0, 0, 0, 0, 0,
0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0}
},
{
{0x02, 0x02},
0x00302154U,
0x2310,
{0x01672543U, 0x45361207U, 0x45632107U, 0x60715234U},
{0x08, 0x08, 0x08, 0x08},
WDQLVL_PAT,
{0, 0, 0, 0, 0, 0, 0, 0,
0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0}
}
}
}
};
void boardcnf_get_brd_clk(uint32_t brd, uint32_t *clk, uint32_t *div)
{
uint32_t md;
md = (mmio_read_32(RST_MODEMR) >> 13) & 0x3U;
switch (md) {
case 0x0U:
*clk = 50U;
*div = 3U;
break;
case 0x1U:
*clk = 60U;
*div = 3U;
break;
case 0x2U:
*clk = 75U;
*div = 3U;
break;
case 0x3U:
*clk = 100U;
*div = 3U;
break;
default:
break;
}
(void)brd;
}
void boardcnf_get_ddr_mbps(uint32_t brd, uint32_t *mbps, uint32_t *div)
{
uint32_t md;
md = (mmio_read_32(RST_MODEMR) >> 17U) & 0x5U;
md = (md | (md >> 1U)) & 0x3U;
switch (md) {
case 0x0U:
*mbps = 3200U;
*div = 1U;
break;
case 0x1U:
*mbps = 2800U;
*div = 1U;
break;
case 0x2U:
*mbps = 2400U;
*div = 1U;
break;
case 0x3U:
*mbps = 1600U;
*div = 1U;
break;
default:
break;
}
(void)brd;
}
#define _def_REFPERIOD 1890
#define M3_SAMPLE_TT_A84 0xB866CC10U, 0x3B250421U
#define M3_SAMPLE_TT_A85 0xB866CC10U, 0x3AA50421U
#define M3_SAMPLE_TT_A86 0xB866CC10U, 0x3AA48421U
#define M3_SAMPLE_FF_B45 0xB866CC10U, 0x3AB00C21U
#define M3_SAMPLE_FF_B49 0xB866CC10U, 0x39B10C21U
#define M3_SAMPLE_FF_B56 0xB866CC10U, 0x3AAF8C21U
#define M3_SAMPLE_SS_E24 0xB866CC10U, 0x3BA39421U
#define M3_SAMPLE_SS_E28 0xB866CC10U, 0x3C231421U
#define M3_SAMPLE_SS_E32 0xB866CC10U, 0x3C241421U
static const uint32_t termcode_by_sample[20][3] = {
{ M3_SAMPLE_TT_A84, 0x000158D5U },
{ M3_SAMPLE_TT_A85, 0x00015955U },
{ M3_SAMPLE_TT_A86, 0x00015955U },
{ M3_SAMPLE_FF_B45, 0x00015690U },
{ M3_SAMPLE_FF_B49, 0x00015753U },
{ M3_SAMPLE_FF_B56, 0x00015793U },
{ M3_SAMPLE_SS_E24, 0x00015996U },
{ M3_SAMPLE_SS_E28, 0x000159D7U },
{ M3_SAMPLE_SS_E32, 0x00015997U },
{ 0xFFFFFFFFU, 0xFFFFFFFFU, 0x0001554FU}
};
#ifdef BOARD_JUDGE_AUTO
/* Board detect function */
#define GPIO_INDT5 0xE605500CU
#define LPDDR4_2RANK (0x01U << 25U)
static uint32_t _board_judge(uint32_t prr_product)
{
uint32_t boardInfo;
uint32_t boardid = 1U;
if (prr_product == PRR_PRODUCT_M3) {
if ((mmio_read_32(PRR) & PRR_CUT_MASK) != RCAR_M3_CUT_VER11) {
boardInfo = mmio_read_32(GPIO_INDT5);
if ((boardInfo & LPDDR4_2RANK) == 0U) {
boardid = 0U;
}
}
}
return boardid;
}
#endif /* BOARD_JUDGE_AUTO */

99
drivers/renesas/rzg/ddr/ddr_b/boot_init_dram_regdef.h
View File

@ -1,99 +0,0 @@
/*
* Copyright (c) 2020, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef RZG_BOOT_INIT_DRAM_REGDEF_H
#define RZG_BOOT_INIT_DRAM_REGDEF_H
#define RCAR_DDR_VERSION "rev.0.40"
#define DRAM_CH_CNT 0x04U
#define SLICE_CNT 0x04U
#define CS_CNT 0x02U
/* order : CS0A, CS0B, CS1A, CS1B */
#define CSAB_CNT (CS_CNT * 2U)
/* order : CH0A, CH0B, CH1A, CH1B, CH2A, CH2B, CH3A, CH3B */
#define CHAB_CNT (DRAM_CH_CNT * 2)
/* pll setting */
#define CLK_DIV(a, diva, b, divb) (((a) * (divb)) / ((b) * (diva)))
#define CLK_MUL(a, diva, b, divb) (((a) * (b)) / ((diva) * (divb)))
/* for ddr density setting */
#define DBMEMCONF_REG(d3, row, bank, col, dw) \
(((d3) << 30U) | ((row) << 24U) | ((bank) << 16U) | ((col) << 8U) | (dw))
#define DBMEMCONF_REGD(density) \
(DBMEMCONF_REG((density) % 2U, ((density) + 1U) / \
2U + (29U - 3U - 10U - 2U), 3U, 10U, 2U))
#define DBMEMCONF_VAL(ch, cs) (DBMEMCONF_REGD(DBMEMCONF_DENS(ch, cs)))
/* refresh mode */
#define DBSC_REFINTS (0x0U)
/* system registers */
#define CPG_FRQCRB (CPG_BASE + 0x0004U)
#define CPG_PLLECR (CPG_BASE + 0x00D0U)
#define CPG_MSTPSR5 (CPG_BASE + 0x003CU)
#define CPG_SRCR4 (CPG_BASE + 0x00BCU)
#define CPG_PLL3CR (CPG_BASE + 0x00DCU)
#define CPG_ZB3CKCR (CPG_BASE + 0x0380U)
#define CPG_FRQCRD (CPG_BASE + 0x00E4U)
#define CPG_SMSTPCR5 (CPG_BASE + 0x0144U)
#define CPG_CPGWPR (CPG_BASE + 0x0900U)
#define CPG_SRSTCLR4 (CPG_BASE + 0x0950U)
#define CPG_FRQCRB_KICK_BIT BIT(31)
#define CPG_PLLECR_PLL3E_BIT BIT(3)
#define CPG_PLLECR_PLL3ST_BIT BIT(11)
#define CPG_ZB3CKCR_ZB3ST_BIT BIT(11)
#define RST_BASE (0xE6160000U)
#define RST_MODEMR (RST_BASE + 0x0060U)
#define LIFEC_CHIPID(x) (0xE6110040U + 0x04U * (x))
/* DBSC registers */
#include "ddr_regs.h"
#define DBSC_DBMONCONF4 0xE6793010U
#define DBSC_PLL_LOCK(ch) (0xE6794054U + 0x100U * (ch))
#define DBSC_PLL_LOCK_0 0xE6794054U
#define DBSC_PLL_LOCK_1 0xE6794154U
#define DBSC_PLL_LOCK_2 0xE6794254U
#define DBSC_PLL_LOCK_3 0xE6794354U
/* STAT registers */
#define MSTAT_SL_INIT 0xE67E8000U
#define MSTAT_REF_ARS 0xE67E8004U
#define MSTATQ_STATQC 0xE67E8008U
#define MSTATQ_WTENABLE 0xE67E8030U
#define MSTATQ_WTREFRESH 0xE67E8034U
#define MSTATQ_WTSETTING0 0xE67E8038U
#define MSTATQ_WTSETTING1 0xE67E803CU
#define QOS_BASE1 (0xE67F0000U)
#define QOSCTRL_RAS (QOS_BASE1 + 0x0000U)
#define QOSCTRL_FIXTH (QOS_BASE1 + 0x0004U)
#define QOSCTRL_RAEN (QOS_BASE1 + 0x0018U)
#define QOSCTRL_REGGD (QOS_BASE1 + 0x0020U)
#define QOSCTRL_DANN (QOS_BASE1 + 0x0030U)
#define QOSCTRL_DANT (QOS_BASE1 + 0x0038U)
#define QOSCTRL_EC (QOS_BASE1 + 0x003CU)
#define QOSCTRL_EMS (QOS_BASE1 + 0x0040U)
#define QOSCTRL_INSFC (QOS_BASE1 + 0x0050U)
#define QOSCTRL_BERR (QOS_BASE1 + 0x0054U)
#define QOSCTRL_RACNT0 (QOS_BASE1 + 0x0080U)
#define QOSCTRL_STATGEN0 (QOS_BASE1 + 0x0088U)
/* other module */
#define THS1_THCTR 0xE6198020U
#define THS1_TEMP 0xE6198028U
#endif /* RZG_BOOT_INIT_DRAM_REGDEF_H */

7
drivers/renesas/rzg/ddr/ddr_b/ddr_b.mk
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@ -1,7 +0,0 @@
#
# Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
BL2_SOURCES += drivers/renesas/rzg/ddr/ddr_b/boot_init_dram.c

5891
drivers/renesas/rzg/ddr/ddr_b/ddr_regdef.h
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File diff suppressed because it is too large Load Diff

472
drivers/renesas/rzg/ddr/ddr_b/init_dram_tbl_g2m.h
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@ -1,472 +0,0 @@
/*
* Copyright (c) 2020U, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef RZG_INIT_DRAM_TABLE_G2M_H
#define RZG_INIT_DRAM_TABLE_G2M_H
#define DDR_PHY_SLICE_REGSET_OFS_G2M 0x0800U
#define DDR_PHY_ADR_V_REGSET_OFS_G2M 0x0a00U
#define DDR_PHY_ADR_I_REGSET_OFS_G2M 0x0a80U
#define DDR_PHY_ADR_G_REGSET_OFS_G2M 0x0b80U
#define DDR_PI_REGSET_OFS_G2M 0x0200U
#define DDR_PHY_SLICE_REGSET_SIZE_G2M 0x80U
#define DDR_PHY_ADR_V_REGSET_SIZE_G2M 0x80U
#define DDR_PHY_ADR_I_REGSET_SIZE_G2M 0x80U
#define DDR_PHY_ADR_G_REGSET_SIZE_G2M 0x80U
#define DDR_PI_REGSET_SIZE_G2M 0x100U
#define DDR_PHY_SLICE_REGSET_NUM_G2M 89
#define DDR_PHY_ADR_V_REGSET_NUM_G2M 37
#define DDR_PHY_ADR_I_REGSET_NUM_G2M 37
#define DDR_PHY_ADR_G_REGSET_NUM_G2M 64
#define DDR_PI_REGSET_NUM_G2M 202
static const uint32_t DDR_PHY_SLICE_REGSET_G2M[DDR_PHY_SLICE_REGSET_NUM_G2M] = {
/*0800*/ 0x76543210U,
/*0801*/ 0x0004f008U,
/*0802*/ 0x00000000U,
/*0803*/ 0x00000000U,
/*0804*/ 0x00010000U,
/*0805*/ 0x036e6e0eU,
/*0806*/ 0x026e6e0eU,
/*0807*/ 0x00010300U,
/*0808*/ 0x04000100U,
/*0809*/ 0x00000300U,
/*080a*/ 0x001700c0U,
/*080b*/ 0x00b00201U,
/*080c*/ 0x00030020U,
/*080d*/ 0x00000000U,
/*080e*/ 0x00000000U,
/*080f*/ 0x00000000U,
/*0810*/ 0x00000000U,
/*0811*/ 0x00000000U,
/*0812*/ 0x00000000U,
/*0813*/ 0x00000000U,
/*0814*/ 0x09000000U,
/*0815*/ 0x04080000U,
/*0816*/ 0x04080400U,
/*0817*/ 0x00000000U,
/*0818*/ 0x32103210U,
/*0819*/ 0x00800708U,
/*081a*/ 0x000f000cU,
/*081b*/ 0x00000100U,
/*081c*/ 0x55aa55aaU,
/*081d*/ 0x33cc33ccU,
/*081e*/ 0x0ff00ff0U,
/*081f*/ 0x0f0ff0f0U,
/*0820*/ 0x00018e38U,
/*0821*/ 0x00000000U,
/*0822*/ 0x00000000U,
/*0823*/ 0x00000000U,
/*0824*/ 0x00000000U,
/*0825*/ 0x00000000U,
/*0826*/ 0x00000000U,
/*0827*/ 0x00000000U,
/*0828*/ 0x00000000U,
/*0829*/ 0x00000000U,
/*082a*/ 0x00000000U,
/*082b*/ 0x00000000U,
/*082c*/ 0x00000000U,
/*082d*/ 0x00000000U,
/*082e*/ 0x00000000U,
/*082f*/ 0x00000000U,
/*0830*/ 0x00000000U,
/*0831*/ 0x00000000U,
/*0832*/ 0x00000000U,
/*0833*/ 0x00200000U,
/*0834*/ 0x08200820U,
/*0835*/ 0x08200820U,
/*0836*/ 0x08200820U,
/*0837*/ 0x08200820U,
/*0838*/ 0x08200820U,
/*0839*/ 0x00000820U,
/*083a*/ 0x03000300U,
/*083b*/ 0x03000300U,
/*083c*/ 0x03000300U,
/*083d*/ 0x03000300U,
/*083e*/ 0x00000300U,
/*083f*/ 0x00000000U,
/*0840*/ 0x00000000U,
/*0841*/ 0x00000000U,
/*0842*/ 0x00000000U,
/*0843*/ 0x00a00000U,
/*0844*/ 0x00a000a0U,
/*0845*/ 0x00a000a0U,
/*0846*/ 0x00a000a0U,
/*0847*/ 0x00a000a0U,
/*0848*/ 0x00a000a0U,
/*0849*/ 0x00a000a0U,
/*084a*/ 0x00a000a0U,
/*084b*/ 0x00a000a0U,
/*084c*/ 0x010900a0U,
/*084d*/ 0x02000104U,
/*084e*/ 0x00000000U,
/*084f*/ 0x00010000U,
/*0850*/ 0x00000200U,
/*0851*/ 0x4041a151U,
/*0852*/ 0xc00141a0U,
/*0853*/ 0x0e0100c0U,
/*0854*/ 0x0010000cU,
/*0855*/ 0x0c064208U,
/*0856*/ 0x000f0c18U,
/*0857*/ 0x00e00140U,
/*0858*/ 0x00000c20U
};
static const uint32_t DDR_PHY_ADR_V_REGSET_G2M[DDR_PHY_ADR_V_REGSET_NUM_G2M] = {
/*0a00*/ 0x00000000U,
/*0a01*/ 0x00000000U,
/*0a02*/ 0x00000000U,
/*0a03*/ 0x00000000U,
/*0a04*/ 0x00000000U,
/*0a05*/ 0x00000000U,
/*0a06*/ 0x00000002U,
/*0a07*/ 0x00000000U,
/*0a08*/ 0x00000000U,
/*0a09*/ 0x00000000U,
/*0a0a*/ 0x00400320U,
/*0a0b*/ 0x00000040U,
/*0a0c*/ 0x00dcba98U,
/*0a0d*/ 0x00000000U,
/*0a0e*/ 0x00dcba98U,
/*0a0f*/ 0x01000000U,
/*0a10*/ 0x00020003U,
/*0a11*/ 0x00000000U,
/*0a12*/ 0x00000000U,
/*0a13*/ 0x00000000U,
/*0a14*/ 0x0000002aU,
/*0a15*/ 0x00000015U,
/*0a16*/ 0x00000015U,
/*0a17*/ 0x0000002aU,
/*0a18*/ 0x00000033U,
/*0a19*/ 0x0000000cU,
/*0a1a*/ 0x0000000cU,
/*0a1b*/ 0x00000033U,
/*0a1c*/ 0x0a418820U,
/*0a1d*/ 0x003f0000U,
/*0a1e*/ 0x0000003fU,
/*0a1f*/ 0x0002c06eU,
/*0a20*/ 0x02c002c0U,
/*0a21*/ 0x02c002c0U,
/*0a22*/ 0x000002c0U,
/*0a23*/ 0x42080010U,
/*0a24*/ 0x00000003U
};
static const uint32_t DDR_PHY_ADR_I_REGSET_G2M[DDR_PHY_ADR_I_REGSET_NUM_G2M] = {
/*0a80*/ 0x04040404U,
/*0a81*/ 0x00000404U,
/*0a82*/ 0x00000000U,
/*0a83*/ 0x00000000U,
/*0a84*/ 0x00000000U,
/*0a85*/ 0x00000000U,
/*0a86*/ 0x00000002U,
/*0a87*/ 0x00000000U,
/*0a88*/ 0x00000000U,
/*0a89*/ 0x00000000U,
/*0a8a*/ 0x00400320U,
/*0a8b*/ 0x00000040U,
/*0a8c*/ 0x00000000U,
/*0a8d*/ 0x00000000U,
/*0a8e*/ 0x00000000U,
/*0a8f*/ 0x01000000U,
/*0a90*/ 0x00020003U,
/*0a91*/ 0x00000000U,
/*0a92*/ 0x00000000U,
/*0a93*/ 0x00000000U,
/*0a94*/ 0x0000002aU,
/*0a95*/ 0x00000015U,
/*0a96*/ 0x00000015U,
/*0a97*/ 0x0000002aU,
/*0a98*/ 0x00000033U,
/*0a99*/ 0x0000000cU,
/*0a9a*/ 0x0000000cU,
/*0a9b*/ 0x00000033U,
/*0a9c*/ 0x00000000U,
/*0a9d*/ 0x00000000U,
/*0a9e*/ 0x00000000U,
/*0a9f*/ 0x0002c06eU,
/*0aa0*/ 0x02c002c0U,
/*0aa1*/ 0x02c002c0U,
/*0aa2*/ 0x000002c0U,
/*0aa3*/ 0x42080010U,
/*0aa4*/ 0x00000003U
};
static const uint32_t DDR_PHY_ADR_G_REGSET_G2M[DDR_PHY_ADR_G_REGSET_NUM_G2M] = {
/*0b80*/ 0x00000001U,
/*0b81*/ 0x00000000U,
/*0b82*/ 0x00000005U,
/*0b83*/ 0x04000f00U,
/*0b84*/ 0x00020080U,
/*0b85*/ 0x00020055U,
/*0b86*/ 0x00000000U,
/*0b87*/ 0x00000000U,
/*0b88*/ 0x00000000U,
/*0b89*/ 0x00000050U,
/*0b8a*/ 0x00000000U,
/*0b8b*/ 0x01010100U,
/*0b8c*/ 0x00000600U,
/*0b8d*/ 0x50640000U,
/*0b8e*/ 0x01421142U,
/*0b8f*/ 0x00000142U,
/*0b90*/ 0x00000000U,
/*0b91*/ 0x000f1600U,
/*0b92*/ 0x0f160f16U,
/*0b93*/ 0x0f160f16U,
/*0b94*/ 0x00000003U,
/*0b95*/ 0x0002c000U,
/*0b96*/ 0x02c002c0U,
/*0b97*/ 0x000002c0U,
/*0b98*/ 0x03421342U,
/*0b99*/ 0x00000342U,
/*0b9a*/ 0x00000000U,
/*0b9b*/ 0x00000000U,
/*0b9c*/ 0x05020000U,
/*0b9d*/ 0x00000000U,
/*0b9e*/ 0x00027f6eU,
/*0b9f*/ 0x047f027fU,
/*0ba0*/ 0x00027f6eU,
/*0ba1*/ 0x00047f6eU,
/*0ba2*/ 0x0003554fU,
/*0ba3*/ 0x0001554fU,
/*0ba4*/ 0x0001554fU,
/*0ba5*/ 0x0001554fU,
/*0ba6*/ 0x0001554fU,
/*0ba7*/ 0x00003feeU,
/*0ba8*/ 0x0001554fU,
/*0ba9*/ 0x00003feeU,
/*0baa*/ 0x0001554fU,
/*0bab*/ 0x00027f6eU,
/*0bac*/ 0x0001554fU,
/*0bad*/ 0x00000000U,
/*0bae*/ 0x00000000U,
/*0baf*/ 0x00000000U,
/*0bb0*/ 0x65000000U,
/*0bb1*/ 0x00000000U,
/*0bb2*/ 0x00000000U,
/*0bb3*/ 0x00000201U,
/*0bb4*/ 0x00000000U,
/*0bb5*/ 0x00000000U,
/*0bb6*/ 0x00000000U,
/*0bb7*/ 0x00000000U,
/*0bb8*/ 0x00000000U,
/*0bb9*/ 0x00000000U,
/*0bba*/ 0x00000000U,
/*0bbb*/ 0x00000000U,
/*0bbc*/ 0x06e40000U,
/*0bbd*/ 0x00000000U,
/*0bbe*/ 0x00000000U,
/*0bbf*/ 0x00010000U
};
static const uint32_t DDR_PI_REGSET_G2M[DDR_PI_REGSET_NUM_G2M] = {
/*0200*/ 0x00000b00U,
/*0201*/ 0x00000100U,
/*0202*/ 0x00000000U,
/*0203*/ 0x0000ffffU,
/*0204*/ 0x00000000U,
/*0205*/ 0x0000ffffU,
/*0206*/ 0x00000000U,
/*0207*/ 0x304cffffU,
/*0208*/ 0x00000200U,
/*0209*/ 0x00000200U,
/*020a*/ 0x00000200U,
/*020b*/ 0x00000200U,
/*020c*/ 0x0000304cU,
/*020d*/ 0x00000200U,
/*020e*/ 0x00000200U,
/*020f*/ 0x00000200U,
/*0210*/ 0x00000200U,
/*0211*/ 0x0000304cU,
/*0212*/ 0x00000200U,
/*0213*/ 0x00000200U,
/*0214*/ 0x00000200U,
/*0215*/ 0x00000200U,
/*0216*/ 0x00010000U,
/*0217*/ 0x00000003U,
/*0218*/ 0x01000001U,
/*0219*/ 0x00000000U,
/*021a*/ 0x00000000U,
/*021b*/ 0x00000000U,
/*021c*/ 0x00000000U,
/*021d*/ 0x00000000U,
/*021e*/ 0x00000000U,
/*021f*/ 0x00000000U,
/*0220*/ 0x00000000U,
/*0221*/ 0x00000000U,
/*0222*/ 0x00000000U,
/*0223*/ 0x00000000U,
/*0224*/ 0x00000000U,
/*0225*/ 0x00000000U,
/*0226*/ 0x00000000U,
/*0227*/ 0x00000000U,
/*0228*/ 0x00000000U,
/*0229*/ 0x0f000101U,
/*022a*/ 0x08492d25U,
/*022b*/ 0x0e0c0004U,
/*022c*/ 0x000e5000U,
/*022d*/ 0x00000250U,
/*022e*/ 0x00460003U,
/*022f*/ 0x182600cfU,
/*0230*/ 0x182600cfU,
/*0231*/ 0x00000005U,
/*0232*/ 0x00000000U,
/*0233*/ 0x00000000U,
/*0234*/ 0x00000000U,
/*0235*/ 0x00000000U,
/*0236*/ 0x00000000U,
/*0237*/ 0x00000000U,
/*0238*/ 0x00000000U,
/*0239*/ 0x01000000U,
/*023a*/ 0x00040404U,
/*023b*/ 0x01280a00U,
/*023c*/ 0x00000000U,
/*023d*/ 0x000f0000U,
/*023e*/ 0x00001803U,
/*023f*/ 0x00000000U,
/*0240*/ 0x00000000U,
/*0241*/ 0x00060002U,
/*0242*/ 0x00010001U,
/*0243*/ 0x01000101U,
/*0244*/ 0x04020201U,
/*0245*/ 0x00080804U,
/*0246*/ 0x00000000U,
/*0247*/ 0x08030000U,
/*0248*/ 0x15150408U,
/*0249*/ 0x00000000U,
/*024a*/ 0x00000000U,
/*024b*/ 0x00000000U,
/*024c*/ 0x000f0f00U,
/*024d*/ 0x0000001eU,
/*024e*/ 0x00000000U,
/*024f*/ 0x01000300U,
/*0250*/ 0x00000000U,
/*0251*/ 0x00000000U,
/*0252*/ 0x01000000U,
/*0253*/ 0x00010101U,
/*0254*/ 0x000e0e0eU,
/*0255*/ 0x000c0c0cU,
/*0256*/ 0x02060601U,
/*0257*/ 0x00000000U,
/*0258*/ 0x00000003U,
/*0259*/ 0x00181703U,
/*025a*/ 0x00280006U,
/*025b*/ 0x00280016U,
/*025c*/ 0x00000016U,
/*025d*/ 0x00000000U,
/*025e*/ 0x00000000U,
/*025f*/ 0x00000000U,
/*0260*/ 0x140a0000U,
/*0261*/ 0x0005010aU,
/*0262*/ 0x03018d03U,
/*0263*/ 0x000a018dU,
/*0264*/ 0x00060100U,
/*0265*/ 0x01000006U,
/*0266*/ 0x018e018eU,
/*0267*/ 0x018e0100U,
/*0268*/ 0x1111018eU,
/*0269*/ 0x10010204U,
/*026a*/ 0x09090650U,
/*026b*/ 0x20110202U,
/*026c*/ 0x00201000U,
/*026d*/ 0x00201000U,
/*026e*/ 0x04041000U,
/*026f*/ 0x18020100U,
/*0270*/ 0x00010118U,
/*0271*/ 0x004b004aU,
/*0272*/ 0x050f0000U,
/*0273*/ 0x0c01021eU,
/*0274*/ 0x34000000U,
/*0275*/ 0x00000000U,
/*0276*/ 0x00000000U,
/*0277*/ 0x00000000U,
/*0278*/ 0x0000d400U,
/*0279*/ 0x0031002eU,
/*027a*/ 0x00111136U,
/*027b*/ 0x002e00d4U,
/*027c*/ 0x11360031U,
/*027d*/ 0x0000d411U,
/*027e*/ 0x0031002eU,
/*027f*/ 0x00111136U,
/*0280*/ 0x002e00d4U,
/*0281*/ 0x11360031U,
/*0282*/ 0x0000d411U,
/*0283*/ 0x0031002eU,
/*0284*/ 0x00111136U,
/*0285*/ 0x002e00d4U,
/*0286*/ 0x11360031U,
/*0287*/ 0x00d40011U,
/*0288*/ 0x0031002eU,
/*0289*/ 0x00111136U,
/*028a*/ 0x002e00d4U,
/*028b*/ 0x11360031U,
/*028c*/ 0x0000d411U,
/*028d*/ 0x0031002eU,
/*028e*/ 0x00111136U,
/*028f*/ 0x002e00d4U,
/*0290*/ 0x11360031U,
/*0291*/ 0x0000d411U,
/*0292*/ 0x0031002eU,
/*0293*/ 0x00111136U,
/*0294*/ 0x002e00d4U,
/*0295*/ 0x11360031U,
/*0296*/ 0x02000011U,
/*0297*/ 0x018d018dU,
/*0298*/ 0x0c08018dU,
/*0299*/ 0x1f121d22U,
/*029a*/ 0x4301b344U,
/*029b*/ 0x10172006U,
/*029c*/ 0x1d220c10U,
/*029d*/ 0x00001f12U,
/*029e*/ 0x4301b344U,
/*029f*/ 0x10172006U,
/*02a0*/ 0x1d220c10U,
/*02a1*/ 0x00001f12U,
/*02a2*/ 0x4301b344U,
/*02a3*/ 0x10172006U,
/*02a4*/ 0x02000210U,
/*02a5*/ 0x02000200U,
/*02a6*/ 0x02000200U,
/*02a7*/ 0x02000200U,
/*02a8*/ 0x02000200U,
/*02a9*/ 0x00000000U,
/*02aa*/ 0x00000000U,
/*02ab*/ 0x00000000U,
/*02ac*/ 0x00000000U,
/*02ad*/ 0x00000000U,
/*02ae*/ 0x00000000U,
/*02af*/ 0x00000000U,
/*02b0*/ 0x00000000U,
/*02b1*/ 0x00000000U,
/*02b2*/ 0x00000000U,
/*02b3*/ 0x00000000U,
/*02b4*/ 0x00000000U,
/*02b5*/ 0x00000400U,
/*02b6*/ 0x15141312U,
/*02b7*/ 0x11100f0eU,
/*02b8*/ 0x080b0c0dU,
/*02b9*/ 0x05040a09U,
/*02ba*/ 0x01000706U,
/*02bb*/ 0x00000302U,
/*02bc*/ 0x01030201U,
/*02bd*/ 0x00304c00U,
/*02be*/ 0x0001e2f8U,
/*02bf*/ 0x0000304cU,
/*02c0*/ 0x0001e2f8U,
/*02c1*/ 0x0000304cU,
/*02c2*/ 0x0001e2f8U,
/*02c3*/ 0x08000000U,
/*02c4*/ 0x00000100U,
/*02c5*/ 0x00000000U,
/*02c6*/ 0x00000000U,
/*02c7*/ 0x00000000U,
/*02c8*/ 0x00000000U,
/*02c9*/ 0x00000002U
};
#endif /* RZG_INIT_DRAM_TABLE_G2M_H */

14
drivers/renesas/rzg/ddr/dram_sub_func.h
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@ -1,14 +0,0 @@
/*
* Copyright (c) 2020, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef DRAM_SUB_FUNC_H
#define DRAM_SUB_FUNC_H
#define DRAM_UPDATE_STATUS_ERR -1
#define DRAM_BOOT_STATUS_COLD 0
#define DRAM_BOOT_STATUS_WARM 1
#endif /* DRAM_SUB_FUNC_H */

700
drivers/renesas/rzg/pfc/G2E/pfc_init_g2e.c Normal file
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@ -0,0 +1,700 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <stdint.h>
#include <lib/mmio.h>
#include "pfc_init_g2e.h"
#include "rcar_def.h"
#include "../pfc_regs.h"
/* PFC */
#define GPSR0_SDA4 BIT(17)
#define GPSR0_SCL4 BIT(16)
#define GPSR0_D15 BIT(15)
#define GPSR0_D14 BIT(14)
#define GPSR0_D13 BIT(13)
#define GPSR0_D12 BIT(12)
#define GPSR0_D11 BIT(11)
#define GPSR0_D10 BIT(10)
#define GPSR0_D9 BIT(9)
#define GPSR0_D8 BIT(8)
#define GPSR0_D7 BIT(7)
#define GPSR0_D6 BIT(6)
#define GPSR0_D5 BIT(5)
#define GPSR0_D4 BIT(4)
#define GPSR0_D3 BIT(3)
#define GPSR0_D2 BIT(2)
#define GPSR0_D1 BIT(1)
#define GPSR0_D0 BIT(0)
#define GPSR1_WE0 BIT(22)
#define GPSR1_CS0 BIT(21)
#define GPSR1_CLKOUT BIT(20)
#define GPSR1_A19 BIT(19)
#define GPSR1_A18 BIT(18)
#define GPSR1_A17 BIT(17)
#define GPSR1_A16 BIT(16)
#define GPSR1_A15 BIT(15)
#define GPSR1_A14 BIT(14)
#define GPSR1_A13 BIT(13)
#define GPSR1_A12 BIT(12)
#define GPSR1_A11 BIT(11)
#define GPSR1_A10 BIT(10)
#define GPSR1_A9 BIT(9)
#define GPSR1_A8 BIT(8)
#define GPSR1_A7 BIT(7)
#define GPSR1_A6 BIT(6)
#define GPSR1_A5 BIT(5)
#define GPSR1_A4 BIT(4)
#define GPSR1_A3 BIT(3)
#define GPSR1_A2 BIT(2)
#define GPSR1_A1 BIT(1)
#define GPSR1_A0 BIT(0)
#define GPSR2_BIT27_REVERSED BIT(27)
#define GPSR2_BIT26_REVERSED BIT(26)
#define GPSR2_EX_WAIT0 BIT(25)
#define GPSR2_RD_WR BIT(24)
#define GPSR2_RD BIT(23)
#define GPSR2_BS BIT(22)
#define GPSR2_AVB_PHY_INT BIT(21)
#define GPSR2_AVB_TXCREFCLK BIT(20)
#define GPSR2_AVB_RD3 BIT(19)
#define GPSR2_AVB_RD2 BIT(18)
#define GPSR2_AVB_RD1 BIT(17)
#define GPSR2_AVB_RD0 BIT(16)
#define GPSR2_AVB_RXC BIT(15)
#define GPSR2_AVB_RX_CTL BIT(14)
#define GPSR2_RPC_RESET BIT(13)
#define GPSR2_RPC_RPC_INT BIT(12)
#define GPSR2_QSPI1_SSL BIT(11)
#define GPSR2_QSPI1_IO3 BIT(10)
#define GPSR2_QSPI1_IO2 BIT(9)
#define GPSR2_QSPI1_MISO_IO1 BIT(8)
#define GPSR2_QSPI1_MOSI_IO0 BIT(7)
#define GPSR2_QSPI1_SPCLK BIT(6)
#define GPSR2_QSPI0_SSL BIT(5)
#define GPSR2_QSPI0_IO3 BIT(4)
#define GPSR2_QSPI0_IO2 BIT(3)
#define GPSR2_QSPI0_MISO_IO1 BIT(2)
#define GPSR2_QSPI0_MOSI_IO0 BIT(1)
#define GPSR2_QSPI0_SPCLK BIT(0)
#define GPSR3_SD1_WP BIT(15)
#define GPSR3_SD1_CD BIT(14)
#define GPSR3_SD0_WP BIT(13)
#define GPSR3_SD0_CD BIT(12)
#define GPSR3_SD1_DAT3 BIT(11)
#define GPSR3_SD1_DAT2 BIT(10)
#define GPSR3_SD1_DAT1 BIT(9)
#define GPSR3_SD1_DAT0 BIT(8)
#define GPSR3_SD1_CMD BIT(7)
#define GPSR3_SD1_CLK BIT(6)
#define GPSR3_SD0_DAT3 BIT(5)
#define GPSR3_SD0_DAT2 BIT(4)
#define GPSR3_SD0_DAT1 BIT(3)
#define GPSR3_SD0_DAT0 BIT(2)
#define GPSR3_SD0_CMD BIT(1)
#define GPSR3_SD0_CLK BIT(0)
#define GPSR4_SD3_DS BIT(10)
#define GPSR4_SD3_DAT7 BIT(9)
#define GPSR4_SD3_DAT6 BIT(8)
#define GPSR4_SD3_DAT5 BIT(7)
#define GPSR4_SD3_DAT4 BIT(6)
#define GPSR4_SD3_DAT3 BIT(5)
#define GPSR4_SD3_DAT2 BIT(4)
#define GPSR4_SD3_DAT1 BIT(3)
#define GPSR4_SD3_DAT0 BIT(2)
#define GPSR4_SD3_CMD BIT(1)
#define GPSR4_SD3_CLK BIT(0)
#define GPSR5_MLB_DAT BIT(19)
#define GPSR5_MLB_SIG BIT(18)
#define GPSR5_MLB_CLK BIT(17)
#define GPSR5_SSI_SDATA9 BIT(16)
#define GPSR5_MSIOF0_SS2 BIT(15)
#define GPSR5_MSIOF0_SS1 BIT(14)
#define GPSR5_MSIOF0_SYNC BIT(13)
#define GPSR5_MSIOF0_TXD BIT(12)
#define GPSR5_MSIOF0_RXD BIT(11)
#define GPSR5_MSIOF0_SCK BIT(10)
#define GPSR5_RX2_A BIT(9)
#define GPSR5_TX2_A BIT(8)
#define GPSR5_SCK2_A BIT(7)
#define GPSR5_TX1 BIT(6)
#define GPSR5_RX1 BIT(5)
#define GPSR5_RTS0_A BIT(4)
#define GPSR5_CTS0_A BIT(3)
#define GPSR5_TX0_A BIT(2)
#define GPSR5_RX0_A BIT(1)
#define GPSR5_SCK0_A BIT(0)
#define GPSR6_USB30_PWEN BIT(17)
#define GPSR6_SSI_SDATA6 BIT(16)
#define GPSR6_SSI_WS6 BIT(15)
#define GPSR6_SSI_SCK6 BIT(14)
#define GPSR6_SSI_SDATA5 BIT(13)
#define GPSR6_SSI_WS5 BIT(12)
#define GPSR6_SSI_SCK5 BIT(11)
#define GPSR6_SSI_SDATA4 BIT(10)
#define GPSR6_USB30_OVC BIT(9)
#define GPSR6_AUDIO_CLKA BIT(8)
#define GPSR6_SSI_SDATA3 BIT(7)
#define GPSR6_SSI_WS349 BIT(6)
#define GPSR6_SSI_SCK349 BIT(5)
#define GPSR6_SSI_SDATA2 BIT(4)
#define GPSR6_SSI_SDATA1 BIT(3)
#define GPSR6_SSI_SDATA0 BIT(2)
#define GPSR6_SSI_WS01239 BIT(1)
#define GPSR6_SSI_SCK01239 BIT(0)
#define IPSR_28_FUNC(x) ((uint32_t)(x) << 28U)
#define IPSR_24_FUNC(x) ((uint32_t)(x) << 24U)
#define IPSR_20_FUNC(x) ((uint32_t)(x) << 20U)
#define IPSR_16_FUNC(x) ((uint32_t)(x) << 16U)
#define IPSR_12_FUNC(x) ((uint32_t)(x) << 12U)
#define IPSR_8_FUNC(x) ((uint32_t)(x) << 8U)
#define IPSR_4_FUNC(x) ((uint32_t)(x) << 4U)
#define IPSR_0_FUNC(x) ((uint32_t)(x) << 0U)
#define POCCTRL0_MASK (0x0007F000U)
#define POC_SD3_DS_33V BIT(29)
#define POC_SD3_DAT7_33V BIT(28)
#define POC_SD3_DAT6_33V BIT(27)
#define POC_SD3_DAT5_33V BIT(26)
#define POC_SD3_DAT4_33V BIT(25)
#define POC_SD3_DAT3_33V BIT(24)
#define POC_SD3_DAT2_33V BIT(23)
#define POC_SD3_DAT1_33V BIT(22)
#define POC_SD3_DAT0_33V BIT(21)
#define POC_SD3_CMD_33V BIT(20)
#define POC_SD3_CLK_33V BIT(19)
#define POC_SD1_DAT3_33V BIT(11)
#define POC_SD1_DAT2_33V BIT(10)
#define POC_SD1_DAT1_33V BIT(9)
#define POC_SD1_DAT0_33V BIT(8)
#define POC_SD1_CMD_33V BIT(7)
#define POC_SD1_CLK_33V BIT(6)
#define POC_SD0_DAT3_33V BIT(5)
#define POC_SD0_DAT2_33V BIT(4)
#define POC_SD0_DAT1_33V BIT(3)
#define POC_SD0_DAT0_33V BIT(2)
#define POC_SD0_CMD_33V BIT(1)
#define POC_SD0_CLK_33V BIT(0)
#define POCCTRL2_MASK (0xFFFFFFFEU)
#define POC2_VREF_33V BIT(0)
#define MOD_SEL0_ADGB_A ((uint32_t)0U << 29U)
#define MOD_SEL0_ADGB_B ((uint32_t)1U << 29U)
#define MOD_SEL0_ADGB_C ((uint32_t)2U << 29U)
#define MOD_SEL0_DRIF0_A ((uint32_t)0U << 28U)
#define MOD_SEL0_DRIF0_B ((uint32_t)1U << 28U)
#define MOD_SEL0_FM_A ((uint32_t)0U << 26U)
#define MOD_SEL0_FM_B ((uint32_t)1U << 26U)
#define MOD_SEL0_FM_C ((uint32_t)2U << 26U)
#define MOD_SEL0_FSO_A ((uint32_t)0U << 25U)
#define MOD_SEL0_FSO_B ((uint32_t)1U << 25U)
#define MOD_SEL0_HSCIF0_A ((uint32_t)0U << 24U)
#define MOD_SEL0_HSCIF0_B ((uint32_t)1U << 24U)
#define MOD_SEL0_HSCIF1_A ((uint32_t)0U << 23U)
#define MOD_SEL0_HSCIF1_B ((uint32_t)1U << 23U)
#define MOD_SEL0_HSCIF2_A ((uint32_t)0U << 22U)
#define MOD_SEL0_HSCIF2_B ((uint32_t)1U << 22U)
#define MOD_SEL0_I2C1_A ((uint32_t)0U << 20U)
#define MOD_SEL0_I2C1_B ((uint32_t)1U << 20U)
#define MOD_SEL0_I2C1_C ((uint32_t)2U << 20U)
#define MOD_SEL0_I2C1_D ((uint32_t)3U << 20U)
#define MOD_SEL0_I2C2_A ((uint32_t)0U << 17U)
#define MOD_SEL0_I2C2_B ((uint32_t)1U << 17U)
#define MOD_SEL0_I2C2_C ((uint32_t)2U << 17U)
#define MOD_SEL0_I2C2_D ((uint32_t)3U << 17U)
#define MOD_SEL0_I2C2_E ((uint32_t)4U << 17U)
#define MOD_SEL0_NDFC_A ((uint32_t)0U << 16U)
#define MOD_SEL0_NDFC_B ((uint32_t)1U << 16U)
#define MOD_SEL0_PWM0_A ((uint32_t)0U << 15U)
#define MOD_SEL0_PWM0_B ((uint32_t)1U << 15U)
#define MOD_SEL0_PWM1_A ((uint32_t)0U << 14U)
#define MOD_SEL0_PWM1_B ((uint32_t)1U << 14U)
#define MOD_SEL0_PWM2_A ((uint32_t)0U << 12U)
#define MOD_SEL0_PWM2_B ((uint32_t)1U << 12U)
#define MOD_SEL0_PWM2_C ((uint32_t)2U << 12U)
#define MOD_SEL0_PWM3_A ((uint32_t)0U << 10U)
#define MOD_SEL0_PWM3_B ((uint32_t)1U << 10U)
#define MOD_SEL0_PWM3_C ((uint32_t)2U << 10U)
#define MOD_SEL0_PWM4_A ((uint32_t)0U << 9U)
#define MOD_SEL0_PWM4_B ((uint32_t)1U << 9U)
#define MOD_SEL0_PWM5_A ((uint32_t)0U << 8U)
#define MOD_SEL0_PWM5_B ((uint32_t)1U << 8U)
#define MOD_SEL0_PWM6_A ((uint32_t)0U << 7U)
#define MOD_SEL0_PWM6_B ((uint32_t)1U << 7U)
#define MOD_SEL0_REMOCON_A ((uint32_t)0U << 5U)
#define MOD_SEL0_REMOCON_B ((uint32_t)1U << 5U)
#define MOD_SEL0_REMOCON_C ((uint32_t)2U << 5U)
#define MOD_SEL0_SCIF_A ((uint32_t)0U << 4U)
#define MOD_SEL0_SCIF_B ((uint32_t)1U << 4U)
#define MOD_SEL0_SCIF0_A ((uint32_t)0U << 3U)
#define MOD_SEL0_SCIF0_B ((uint32_t)1U << 3U)
#define MOD_SEL0_SCIF2_A ((uint32_t)0U << 2U)
#define MOD_SEL0_SCIF2_B ((uint32_t)1U << 2U)
#define MOD_SEL0_SPEED_PULSE_IF_A ((uint32_t)0U << 0U)
#define MOD_SEL0_SPEED_PULSE_IF_B ((uint32_t)1U << 0U)
#define MOD_SEL0_SPEED_PULSE_IF_C ((uint32_t)2U << 0U)
#define MOD_SEL1_SIMCARD_A ((uint32_t)0U << 31U)
#define MOD_SEL1_SIMCARD_B ((uint32_t)1U << 31U)
#define MOD_SEL1_SSI2_A ((uint32_t)0U << 30U)
#define MOD_SEL1_SSI2_B ((uint32_t)1U << 30U)
#define MOD_SEL1_TIMER_TMU_A ((uint32_t)0U << 29U)
#define MOD_SEL1_TIMER_TMU_B ((uint32_t)1U << 29U)
#define MOD_SEL1_USB20_CH0_A ((uint32_t)0U << 28U)
#define MOD_SEL1_USB20_CH0_B ((uint32_t)1U << 28U)
#define MOD_SEL1_DRIF2_A ((uint32_t)0U << 26U)
#define MOD_SEL1_DRIF2_B ((uint32_t)1U << 26U)
#define MOD_SEL1_DRIF3_A ((uint32_t)0U << 25U)
#define MOD_SEL1_DRIF3_B ((uint32_t)1U << 25U)
#define MOD_SEL1_HSCIF3_A ((uint32_t)0U << 22U)
#define MOD_SEL1_HSCIF3_B ((uint32_t)1U << 22U)
#define MOD_SEL1_HSCIF3_C ((uint32_t)2U << 22U)
#define MOD_SEL1_HSCIF3_D ((uint32_t)3U << 22U)
#define MOD_SEL1_HSCIF3_E ((uint32_t)4U << 22U)
#define MOD_SEL1_HSCIF4_A ((uint32_t)0U << 19U)
#define MOD_SEL1_HSCIF4_B ((uint32_t)1U << 19U)
#define MOD_SEL1_HSCIF4_C ((uint32_t)2U << 19U)
#define MOD_SEL1_HSCIF4_D ((uint32_t)3U << 19U)
#define MOD_SEL1_HSCIF4_E ((uint32_t)4U << 19U)
#define MOD_SEL1_I2C6_A ((uint32_t)0U << 18U)
#define MOD_SEL1_I2C6_B ((uint32_t)1U << 18U)
#define MOD_SEL1_I2C7_A ((uint32_t)0U << 17U)
#define MOD_SEL1_I2C7_B ((uint32_t)1U << 17U)
#define MOD_SEL1_MSIOF2_A ((uint32_t)0U << 16U)
#define MOD_SEL1_MSIOF2_B ((uint32_t)1U << 16U)
#define MOD_SEL1_MSIOF3_A ((uint32_t)0U << 15U)
#define MOD_SEL1_MSIOF3_B ((uint32_t)1U << 15U)
#define MOD_SEL1_SCIF3_A ((uint32_t)0U << 13U)
#define MOD_SEL1_SCIF3_B ((uint32_t)1U << 13U)
#define MOD_SEL1_SCIF3_C ((uint32_t)2U << 13U)
#define MOD_SEL1_SCIF4_A ((uint32_t)0U << 11U)
#define MOD_SEL1_SCIF4_B ((uint32_t)1U << 11U)
#define MOD_SEL1_SCIF4_C ((uint32_t)2U << 11U)
#define MOD_SEL1_SCIF5_A ((uint32_t)0U << 9U)
#define MOD_SEL1_SCIF5_B ((uint32_t)1U << 9U)
#define MOD_SEL1_SCIF5_C ((uint32_t)2U << 9U)
#define MOD_SEL1_VIN4_A ((uint32_t)0U << 8U)
#define MOD_SEL1_VIN4_B ((uint32_t)1U << 8U)
#define MOD_SEL1_VIN5_A ((uint32_t)0U << 7U)
#define MOD_SEL1_VIN5_B ((uint32_t)1U << 7U)
#define MOD_SEL1_ADGC_A ((uint32_t)0U << 5U)
#define MOD_SEL1_ADGC_B ((uint32_t)1U << 5U)
#define MOD_SEL1_ADGC_C ((uint32_t)2U << 5U)
#define MOD_SEL1_SSI9_A ((uint32_t)0U << 4U)
#define MOD_SEL1_SSI9_B ((uint32_t)1U << 4U)
static void pfc_reg_write(uint32_t addr, uint32_t data)
{
mmio_write_32(PFC_PMMR, ~data);
mmio_write_32((uintptr_t)addr, data);
}
void pfc_init_g2e(void)
{
uint32_t reg;
/* initialize module select */
pfc_reg_write(PFC_MOD_SEL0,
MOD_SEL0_ADGB_A |
MOD_SEL0_DRIF0_A |
MOD_SEL0_FM_A |
MOD_SEL0_FSO_A |
MOD_SEL0_HSCIF0_A |
MOD_SEL0_HSCIF1_A |
MOD_SEL0_HSCIF2_A |
MOD_SEL0_I2C1_A |
MOD_SEL0_I2C2_A |
MOD_SEL0_NDFC_A |
MOD_SEL0_PWM0_A |
MOD_SEL0_PWM1_A |
MOD_SEL0_PWM2_A |
MOD_SEL0_PWM3_A |
MOD_SEL0_PWM4_A |
MOD_SEL0_PWM5_A |
MOD_SEL0_PWM6_A |
MOD_SEL0_REMOCON_A |
MOD_SEL0_SCIF_A |
MOD_SEL0_SCIF0_A |
MOD_SEL0_SCIF2_A |
MOD_SEL0_SPEED_PULSE_IF_A);
pfc_reg_write(PFC_MOD_SEL1,
MOD_SEL1_SIMCARD_A |
MOD_SEL1_SSI2_A |
MOD_SEL1_TIMER_TMU_A |
MOD_SEL1_USB20_CH0_B |
MOD_SEL1_DRIF2_A |
MOD_SEL1_DRIF3_A |
MOD_SEL1_HSCIF3_C |
MOD_SEL1_HSCIF4_B |
MOD_SEL1_I2C6_A |
MOD_SEL1_I2C7_A |
MOD_SEL1_MSIOF2_A |
MOD_SEL1_MSIOF3_A |
MOD_SEL1_SCIF3_A |
MOD_SEL1_SCIF4_A |
MOD_SEL1_SCIF5_A |
MOD_SEL1_VIN4_A |
MOD_SEL1_VIN5_A |
MOD_SEL1_ADGC_A |
MOD_SEL1_SSI9_A);
/* initialize peripheral function select */
pfc_reg_write(PFC_IPSR0,
IPSR_28_FUNC(2) | /* HRX4_B */
IPSR_24_FUNC(2) | /* HTX4_B */
IPSR_20_FUNC(0) | /* QSPI1_SPCLK */
IPSR_16_FUNC(0) | /* QSPI0_IO3 */
IPSR_12_FUNC(0) | /* QSPI0_IO2 */
IPSR_8_FUNC(0) | /* QSPI0_MISO/IO1 */
IPSR_4_FUNC(0) | /* QSPI0_MOSI/IO0 */
IPSR_0_FUNC(0)); /* QSPI0_SPCLK */
pfc_reg_write(PFC_IPSR1,
IPSR_28_FUNC(0) | /* AVB_RD2 */
IPSR_24_FUNC(0) | /* AVB_RD1 */
IPSR_20_FUNC(0) | /* AVB_RD0 */
IPSR_16_FUNC(0) | /* RPC_RESET# */
IPSR_12_FUNC(0) | /* RPC_INT# */
IPSR_8_FUNC(0) | /* QSPI1_SSL */
IPSR_4_FUNC(2) | /* HRX3_C */
IPSR_0_FUNC(2)); /* HTX3_C */
pfc_reg_write(PFC_IPSR2,
IPSR_28_FUNC(1) | /* IRQ0 */
IPSR_24_FUNC(0) |
IPSR_20_FUNC(0) |
IPSR_16_FUNC(2) | /* AVB_LINK */
IPSR_12_FUNC(0) |
IPSR_8_FUNC(0) | /* AVB_MDC */
IPSR_4_FUNC(0) | /* AVB_MDIO */
IPSR_0_FUNC(0)); /* AVB_TXCREFCLK */
pfc_reg_write(PFC_IPSR3,
IPSR_28_FUNC(5) | /* DU_HSYNC */
IPSR_24_FUNC(0) |
IPSR_20_FUNC(0) |
IPSR_16_FUNC(0) |
IPSR_12_FUNC(5) | /* DU_DG4 */
IPSR_8_FUNC(5) | /* DU_DOTCLKOUT0 */
IPSR_4_FUNC(5) | /* DU_DISP */
IPSR_0_FUNC(1)); /* IRQ1 */
pfc_reg_write(PFC_IPSR4,
IPSR_28_FUNC(5) | /* DU_DB5 */
IPSR_24_FUNC(5) | /* DU_DB4 */
IPSR_20_FUNC(5) | /* DU_DB3 */
IPSR_16_FUNC(5) | /* DU_DB2 */
IPSR_12_FUNC(5) | /* DU_DG6 */
IPSR_8_FUNC(5) | /* DU_VSYNC */
IPSR_4_FUNC(5) | /* DU_DG5 */
IPSR_0_FUNC(5)); /* DU_DG7 */
pfc_reg_write(PFC_IPSR5,
IPSR_28_FUNC(5) | /* DU_DR3 */
IPSR_24_FUNC(5) | /* DU_DB7 */
IPSR_20_FUNC(5) | /* DU_DR2 */
IPSR_16_FUNC(5) | /* DU_DR1 */
IPSR_12_FUNC(5) | /* DU_DR0 */
IPSR_8_FUNC(5) | /* DU_DB1 */
IPSR_4_FUNC(5) | /* DU_DB0 */
IPSR_0_FUNC(5)); /* DU_DB6 */
pfc_reg_write(PFC_IPSR6,
IPSR_28_FUNC(5) | /* DU_DG1 */
IPSR_24_FUNC(5) | /* DU_DG0 */
IPSR_20_FUNC(5) | /* DU_DR7 */
IPSR_16_FUNC(1) | /* CANFD1_RX */
IPSR_12_FUNC(5) | /* DU_DR6 */
IPSR_8_FUNC(5) | /* DU_DR5 */
IPSR_4_FUNC(1) | /* CANFD1_TX */
IPSR_0_FUNC(5)); /* DU_DR4 */
pfc_reg_write(PFC_IPSR7,
IPSR_28_FUNC(0) | /* SD0_CLK */
IPSR_24_FUNC(0) |
IPSR_20_FUNC(5) | /* DU_DOTCLKIN0 */
IPSR_16_FUNC(5) | /* DU_DG3 */
IPSR_12_FUNC(1) | /* CAN_CLK */
IPSR_8_FUNC(1) | /* CANFD0_RX */
IPSR_4_FUNC(1) | /* CANFD0_TX */
IPSR_0_FUNC(5)); /* DU_DG2 */
pfc_reg_write(PFC_IPSR8,
IPSR_28_FUNC(0) | /* SD1_DAT0 */
IPSR_24_FUNC(0) | /* SD1_CMD */
IPSR_20_FUNC(0) | /* SD1_CLK */
IPSR_16_FUNC(0) | /* SD0_DAT3 */
IPSR_12_FUNC(0) | /* SD0_DAT2 */
IPSR_8_FUNC(0) | /* SD0_DAT1 */
IPSR_4_FUNC(0) | /* SD0_DAT0 */
IPSR_0_FUNC(0)); /* SD0_CMD */
pfc_reg_write(PFC_IPSR9,
IPSR_28_FUNC(0) | /* SD3_DAT2 */
IPSR_24_FUNC(0) | /* SD3_DAT1 */
IPSR_20_FUNC(0) | /* SD3_DAT0 */
IPSR_16_FUNC(0) | /* SD3_CMD */
IPSR_12_FUNC(0) | /* SD3_CLK */
IPSR_8_FUNC(0) | /* SD1_DAT3 */
IPSR_4_FUNC(0) | /* SD1_DAT2 */
IPSR_0_FUNC(0)); /* SD1_DAT1 */
pfc_reg_write(PFC_IPSR10,
IPSR_24_FUNC(0) | /* SD0_CD */
IPSR_20_FUNC(0) | /* SD3_DS */
IPSR_16_FUNC(0) | /* SD3_DAT7 */
IPSR_12_FUNC(0) | /* SD3_DAT6 */
IPSR_8_FUNC(0) | /* SD3_DAT5 */
IPSR_4_FUNC(0) | /* SD3_DAT4 */
IPSR_0_FUNC(0)); /* SD3_DAT3 */
pfc_reg_write(PFC_IPSR11,
IPSR_28_FUNC(0) |
IPSR_24_FUNC(8) | /* USB0_ID */
IPSR_20_FUNC(2) | /* AUDIO_CLKOUT1_A */
IPSR_16_FUNC(0) | /* CTS0#_A */
IPSR_12_FUNC(0) |
IPSR_8_FUNC(0) |
IPSR_4_FUNC(0) | /* SD1_WP */
IPSR_0_FUNC(0)); /* SD1_CD */
pfc_reg_write(PFC_IPSR12,
IPSR_28_FUNC(0) |
IPSR_24_FUNC(0) |
IPSR_20_FUNC(0) |
IPSR_16_FUNC(0) |
IPSR_12_FUNC(0) | /* RX2_A */
IPSR_8_FUNC(0) | /* TX2_A */
IPSR_4_FUNC(0) | /* SCK2_A */
IPSR_0_FUNC(0));
pfc_reg_write(PFC_IPSR13,
IPSR_28_FUNC(0) |
IPSR_24_FUNC(0) |
IPSR_20_FUNC(0) |
IPSR_16_FUNC(4) | /* SDA1_B */
IPSR_12_FUNC(4) | /* SCL1_B */
IPSR_8_FUNC(0) | /* SSI_SDATA9 */
IPSR_4_FUNC(1) | /* HTX2_A */
IPSR_0_FUNC(1)); /* HRX2_A */
pfc_reg_write(PFC_IPSR14,
IPSR_28_FUNC(0) | /* SSI_SCK5 */
IPSR_24_FUNC(0) | /* SSI_SDATA4 */
IPSR_20_FUNC(0) | /* SSI_SDATA3 */
IPSR_16_FUNC(0) | /* SSI_WS349 */
IPSR_12_FUNC(0) | /* SSI_SCK349 */
IPSR_8_FUNC(0) |
IPSR_4_FUNC(0) | /* SSI_SDATA1 */
IPSR_0_FUNC(0));/* SSI_SDATA0 */
pfc_reg_write(PFC_IPSR15,
IPSR_28_FUNC(0) | /* USB30_OVC */
IPSR_24_FUNC(0) | /* USB30_PWEN */
IPSR_20_FUNC(0) | /* AUDIO_CLKA */
IPSR_16_FUNC(1) | /* HRTS2#_A */
IPSR_12_FUNC(1) | /* HCTS2#_A */
IPSR_8_FUNC(3) | /* TPU0TO1 */
IPSR_4_FUNC(3) | /* TPU0TO0 */
IPSR_0_FUNC(0)); /* SSI_WS5 */
/* initialize GPIO/peripheral function select */
pfc_reg_write(PFC_GPSR0,
GPSR0_SCL4 |
GPSR0_D15 |
GPSR0_D14 |
GPSR0_D13 |
GPSR0_D12 |
GPSR0_D11 |
GPSR0_D10 |
GPSR0_D9 |
GPSR0_D8 |
GPSR0_D7 |
GPSR0_D6 |
GPSR0_D5 |
GPSR0_D4 |
GPSR0_D3 |
GPSR0_D2 |
GPSR0_D1 |
GPSR0_D0);
pfc_reg_write(PFC_GPSR1,
GPSR1_WE0 |
GPSR1_CS0 |
GPSR1_A19 |
GPSR1_A18 |
GPSR1_A17 |
GPSR1_A16 |
GPSR1_A15 |
GPSR1_A14 |
GPSR1_A13 |
GPSR1_A12 |
GPSR1_A11 |
GPSR1_A10 |
GPSR1_A9 |
GPSR1_A8 |
GPSR1_A4 |
GPSR1_A3 |
GPSR1_A2 |
GPSR1_A1 |
GPSR1_A0);
pfc_reg_write(PFC_GPSR2,
GPSR2_BIT27_REVERSED |
GPSR2_BIT26_REVERSED |
GPSR2_AVB_PHY_INT |
GPSR2_AVB_TXCREFCLK |
GPSR2_AVB_RD3 |
GPSR2_AVB_RD2 |
GPSR2_AVB_RD1 |
GPSR2_AVB_RD0 |
GPSR2_AVB_RXC |
GPSR2_AVB_RX_CTL |
GPSR2_RPC_RESET |
GPSR2_RPC_RPC_INT |
GPSR2_QSPI1_IO3 |
GPSR2_QSPI1_IO2 |
GPSR2_QSPI1_MISO_IO1 |
GPSR2_QSPI1_MOSI_IO0 |
GPSR2_QSPI0_SSL |
GPSR2_QSPI0_IO3 |
GPSR2_QSPI0_IO2 |
GPSR2_QSPI0_MISO_IO1 |
GPSR2_QSPI0_MOSI_IO0 |
GPSR2_QSPI0_SPCLK);
pfc_reg_write(PFC_GPSR3,
GPSR3_SD0_CD |
GPSR3_SD1_DAT3 |
GPSR3_SD1_DAT2 |
GPSR3_SD1_DAT1 |
GPSR3_SD1_DAT0 |
GPSR3_SD1_CMD |
GPSR3_SD1_CLK |
GPSR3_SD0_DAT3 |
GPSR3_SD0_DAT2 |
GPSR3_SD0_DAT1 |
GPSR3_SD0_DAT0 |
GPSR3_SD0_CMD |
GPSR3_SD0_CLK);
pfc_reg_write(PFC_GPSR4,
GPSR4_SD3_DAT3 |
GPSR4_SD3_DAT2 |
GPSR4_SD3_DAT1 |
GPSR4_SD3_DAT0 |
GPSR4_SD3_CMD |
GPSR4_SD3_CLK);
pfc_reg_write(PFC_GPSR5,
GPSR5_MLB_SIG |
GPSR5_MLB_CLK |
GPSR5_SSI_SDATA9 |
GPSR5_MSIOF0_SS2 |
GPSR5_MSIOF0_SS1 |
GPSR5_MSIOF0_SYNC |
GPSR5_MSIOF0_TXD |
GPSR5_MSIOF0_RXD |
GPSR5_MSIOF0_SCK |
GPSR5_RX2_A |
GPSR5_TX2_A |
GPSR5_RTS0_A |
GPSR5_SCK0_A);
pfc_reg_write(PFC_GPSR6,
GPSR6_USB30_PWEN |
GPSR6_SSI_SDATA6 |
GPSR6_SSI_WS6 |
GPSR6_SSI_SCK6 |
GPSR6_SSI_SDATA5 |
GPSR6_SSI_SCK5 |
GPSR6_SSI_SDATA4 |
GPSR6_USB30_OVC |
GPSR6_AUDIO_CLKA |
GPSR6_SSI_SDATA3 |
GPSR6_SSI_WS349 |
GPSR6_SSI_SCK349 |
GPSR6_SSI_SDATA0 |
GPSR6_SSI_WS01239 |
GPSR6_SSI_SCK01239);
/* initialize POC control */
reg = mmio_read_32(PFC_POCCTRL0);
reg = (reg & POCCTRL0_MASK) |
POC_SD1_DAT3_33V |
POC_SD1_DAT2_33V |
POC_SD1_DAT1_33V |
POC_SD1_DAT0_33V |
POC_SD1_CMD_33V |
POC_SD1_CLK_33V |
POC_SD0_DAT3_33V |
POC_SD0_DAT2_33V |
POC_SD0_DAT1_33V |
POC_SD0_DAT0_33V |
POC_SD0_CMD_33V |
POC_SD0_CLK_33V;
pfc_reg_write(PFC_POCCTRL0, reg);
reg = mmio_read_32(PFC_POCCTRL2);
reg = ((reg & POCCTRL2_MASK) & ~POC2_VREF_33V);
pfc_reg_write(PFC_POCCTRL2, reg);
/* initialize LSI pin pull-up/down control */
pfc_reg_write(PFC_PUD0, 0x00080000U);
pfc_reg_write(PFC_PUD1, 0xCE398464U);
pfc_reg_write(PFC_PUD2, 0xA4C380F4U);
pfc_reg_write(PFC_PUD3, 0x0000079FU);
pfc_reg_write(PFC_PUD4, 0xFFF0FFFFU);
pfc_reg_write(PFC_PUD5, 0x40000000U);
/* initialize LSI pin pull-enable register */
pfc_reg_write(PFC_PUEN0, 0x00000000U);
pfc_reg_write(PFC_PUEN1, 0x00300000U);
pfc_reg_write(PFC_PUEN2, 0x00400074U);
pfc_reg_write(PFC_PUEN3, 0x00000000U);
pfc_reg_write(PFC_PUEN4, 0x07900600U);
pfc_reg_write(PFC_PUEN5, 0x00000000U);
/* initialize positive/negative logic select */
mmio_write_32(GPIO_POSNEG0, 0x00000000U);
mmio_write_32(GPIO_POSNEG1, 0x00000000U);
mmio_write_32(GPIO_POSNEG2, 0x00000000U);
mmio_write_32(GPIO_POSNEG3, 0x00000000U);
mmio_write_32(GPIO_POSNEG4, 0x00000000U);
mmio_write_32(GPIO_POSNEG5, 0x00000000U);
mmio_write_32(GPIO_POSNEG6, 0x00000000U);
/* initialize general IO/interrupt switching */
mmio_write_32(GPIO_IOINTSEL0, 0x00000000U);
mmio_write_32(GPIO_IOINTSEL1, 0x00000000U);
mmio_write_32(GPIO_IOINTSEL2, 0x00000000U);
mmio_write_32(GPIO_IOINTSEL3, 0x00000000U);
mmio_write_32(GPIO_IOINTSEL4, 0x00000000U);
mmio_write_32(GPIO_IOINTSEL5, 0x00000000U);
mmio_write_32(GPIO_IOINTSEL6, 0x00000000U);
/* initialize general output register */
mmio_write_32(GPIO_OUTDT0, 0x00000000U);
mmio_write_32(GPIO_OUTDT1, 0x00000000U);
mmio_write_32(GPIO_OUTDT2, 0x00000000U);
mmio_write_32(GPIO_OUTDT3, 0x00006000U);
mmio_write_32(GPIO_OUTDT5, 0x00000000U);
mmio_write_32(GPIO_OUTDT6, 0x00000000U);
/* initialize general input/output switching */
mmio_write_32(GPIO_INOUTSEL0, 0x00020000U);
mmio_write_32(GPIO_INOUTSEL1, 0x00100000U);
mmio_write_32(GPIO_INOUTSEL2, 0x03000000U);
mmio_write_32(GPIO_INOUTSEL3, 0x0000E000U);
mmio_write_32(GPIO_INOUTSEL4, 0x00000440U);
mmio_write_32(GPIO_INOUTSEL5, 0x00080000U);
mmio_write_32(GPIO_INOUTSEL6, 0x00000010U);
}

12
drivers/renesas/rzg/pfc/G2E/pfc_init_g2e.h Normal file
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@ -0,0 +1,12 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PFC_INIT_G2E_H
#define PFC_INIT_G2E_H
void pfc_init_g2e(void);
#endif /* PFC_INIT_G2E_H */

1310
drivers/renesas/rzg/pfc/G2H/pfc_init_g2h.c Normal file
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File diff suppressed because it is too large Load Diff

12
drivers/renesas/rzg/pfc/G2H/pfc_init_g2h.h Normal file
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@ -0,0 +1,12 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PFC_INIT_G2H_H
#define PFC_INIT_G2H_H
void pfc_init_g2h(void);
#endif /* PFC_INIT_G2H_H */

1306
drivers/renesas/rzg/pfc/G2N/pfc_init_g2n.c Normal file
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File diff suppressed because it is too large Load Diff

12
drivers/renesas/rzg/pfc/G2N/pfc_init_g2n.h Normal file
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@ -0,0 +1,12 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PFC_INIT_G2N_H
#define PFC_INIT_G2N_H
void pfc_init_g2n(void);
#endif /* PFC_INIT_G2N_H */

23
drivers/renesas/rzg/pfc/pfc.mk
View File

@ -1,20 +1,41 @@
#
# Copyright (c) 2020, Renesas Electronics Corporation. All rights reserved.
# Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
ifeq (${RCAR_LSI},${RCAR_AUTO})
BL2_SOURCES += drivers/renesas/rzg/pfc/G2M/pfc_init_g2m.c
BL2_SOURCES += drivers/renesas/rzg/pfc/G2H/pfc_init_g2h.c
BL2_SOURCES += drivers/renesas/rzg/pfc/G2N/pfc_init_g2n.c
BL2_SOURCES += drivers/renesas/rzg/pfc/G2E/pfc_init_g2e.c
else ifdef RCAR_LSI_CUT_COMPAT
ifeq (${RCAR_LSI},${RZ_G2M})
BL2_SOURCES += drivers/renesas/rzg/pfc/G2M/pfc_init_g2m.c
endif
ifeq (${RCAR_LSI},${RZ_G2H})
BL2_SOURCES += drivers/renesas/rzg/pfc/G2H/pfc_init_g2h.c
endif
ifeq (${RCAR_LSI},${RZ_G2N})
BL2_SOURCES += drivers/renesas/rzg/pfc/G2N/pfc_init_g2n.c
endif
ifeq (${RCAR_LSI},${RZ_G2E})
BL2_SOURCES += drivers/renesas/rzg/pfc/G2E/pfc_init_g2e.c
endif
else
ifeq (${RCAR_LSI},${RZ_G2M})
BL2_SOURCES += drivers/renesas/rzg/pfc/G2M/pfc_init_g2m.c
endif
ifeq (${RCAR_LSI},${RZ_G2H})
BL2_SOURCES += drivers/renesas/rzg/pfc/G2H/pfc_init_g2h.c
endif
ifeq (${RCAR_LSI},${RZ_G2N})
BL2_SOURCES += drivers/renesas/rzg/pfc/G2N/pfc_init_g2n.c
endif
ifeq (${RCAR_LSI},${RZ_G2E})
BL2_SOURCES += drivers/renesas/rzg/pfc/G2E/pfc_init_g2e.c
endif
endif
BL2_SOURCES += drivers/renesas/rzg/pfc/pfc_init.c

59
drivers/renesas/rzg/pfc/pfc_init.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2020, Renesas Electronics Corporation. All rights reserved.
* Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -9,11 +9,23 @@
#include <lib/mmio.h>
#if RCAR_LSI == RCAR_AUTO
#include "G2E/pfc_init_g2e.h"
#include "G2H/pfc_init_g2h.h"
#include "G2M/pfc_init_g2m.h"
#include "G2N/pfc_init_g2n.h"
#endif /* RCAR_LSI == RCAR_AUTO */
#if (RCAR_LSI == RZ_G2E)
#include "G2E/pfc_init_g2e.h"
#endif /* RCAR_LSI == RZ_G2N */
#if (RCAR_LSI == RZ_G2H)
#include "G2H/pfc_init_g2h.h"
#endif /* RCAR_LSI == RZ_G2H */
#if (RCAR_LSI == RZ_G2M)
#include "G2M/pfc_init_g2m.h"
#endif /* RCAR_LSI == RZ_G2M */
#if (RCAR_LSI == RZ_G2N)
#include "G2N/pfc_init_g2n.h"
#endif /* RCAR_LSI == RZ_G2N */
#include "rcar_def.h"
#define PRR_PRODUCT_ERR(reg) \
@ -40,6 +52,15 @@ void rzg_pfc_init(void)
case PRR_PRODUCT_M3:
pfc_init_g2m();
break;
case PRR_PRODUCT_H3:
pfc_init_g2h();
break;
case PRR_PRODUCT_M3N:
pfc_init_g2n();
break;
case PRR_PRODUCT_E3:
pfc_init_g2e();
break;
default:
PRR_PRODUCT_ERR(reg);
break;
@ -54,6 +75,27 @@ void rzg_pfc_init(void)
pfc_init_g2m();
#endif /* RCAR_LSI != RZ_G2M */
break;
case PRR_PRODUCT_H3:
#if (RCAR_LSI != RZ_G2H)
PRR_PRODUCT_ERR(reg);
#else /* RCAR_LSI != RZ_G2H */
pfc_init_g2h();
#endif /* RCAR_LSI != RZ_G2H */
break;
case PRR_PRODUCT_M3N:
#if RCAR_LSI != RZ_G2N
PRR_PRODUCT_ERR(reg);
#else
pfc_init_g2n();
#endif /* RCAR_LSI != RZ_G2N */
break;
case PRR_PRODUCT_E3:
#if RCAR_LSI != RZ_G2E
PRR_PRODUCT_ERR(reg);
#else
pfc_init_g2e();
#endif
break;
default:
PRR_PRODUCT_ERR(reg);
break;
@ -65,6 +107,21 @@ void rzg_pfc_init(void)
PRR_PRODUCT_ERR(reg);
}
pfc_init_m3();
#elif (RCAR_LSI == RZ_G2H)
if ((reg & PRR_PRODUCT_MASK) != PRR_PRODUCT_H3) {
PRR_PRODUCT_ERR(reg);
}
pfc_init_g2h();
#elif (RCAR_LSI == RZ_G2N) /* G2N */
if ((reg & PRR_PRODUCT_MASK) != PRR_PRODUCT_M3N) {
PRR_PRODUCT_ERR(reg);
}
pfc_init_g2n();
#elif (RCAR_LSI == RZ_G2E)
if ((reg & PRR_PRODUCT_MASK) != PRR_PRODUCT_E3) {
PRR_PRODUCT_ERR(reg);
}
pfc_init_g2e();
#else /* RCAR_LSI == RZ_G2M */
#error "Don't have PFC initialize routine(unknown)."
#endif /* RCAR_LSI == RZ_G2M */

140
drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10.c Normal file
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@ -0,0 +1,140 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <stdint.h>
#include <common/debug.h>
#include <lib/mmio.h>
#include "qos_init_g2e_v10.h"
#include "../qos_common.h"
#include "../qos_reg.h"
#define RCAR_QOS_VERSION "rev.0.05"
#define REF_ARS_ARBSTOPCYCLE_G2E (((SL_INIT_SSLOTCLK_G2E) - 5U) << 16U)
#if RCAR_QOS_TYPE == RCAR_QOS_TYPE_DEFAULT
#if RCAR_REF_INT == RCAR_REF_DEFAULT
#include "qos_init_g2e_v10_mstat390.h"
#else
#include "qos_init_g2e_v10_mstat780.h"
#endif /* RCAR_REF_INT == RCAR_REF_DEFAULT */
#endif /* RCAR_QOS_TYPE == RCAR_QOS_TYPE_DEFAULT */
static const struct rcar_gen3_dbsc_qos_settings g2e_qos[] = {
/* BUFCAM settings */
{ DBSC_DBCAM0CNF1, 0x00043218U },
{ DBSC_DBCAM0CNF2, 0x000000F4U },
{ DBSC_DBSCHCNT0, 0x000F0037U },
{ DBSC_DBSCHSZ0, 0x00000001U },
{ DBSC_DBSCHRW0, 0x22421111U },
/* DDR3 */
{ DBSC_SCFCTST2, 0x012F1123U },
/* QoS Settings */
{ DBSC_DBSCHQOS00, 0x00000F00U },
{ DBSC_DBSCHQOS01, 0x00000B00U },
{ DBSC_DBSCHQOS02, 0x00000000U },
{ DBSC_DBSCHQOS03, 0x00000000U },
{ DBSC_DBSCHQOS40, 0x00000300U },
{ DBSC_DBSCHQOS41, 0x000002F0U },
{ DBSC_DBSCHQOS42, 0x00000200U },
{ DBSC_DBSCHQOS43, 0x00000100U },
{ DBSC_DBSCHQOS90, 0x00000100U },
{ DBSC_DBSCHQOS91, 0x000000F0U },
{ DBSC_DBSCHQOS92, 0x000000A0U },
{ DBSC_DBSCHQOS93, 0x00000040U },
{ DBSC_DBSCHQOS130, 0x00000100U },
{ DBSC_DBSCHQOS131, 0x000000F0U },
{ DBSC_DBSCHQOS132, 0x000000A0U },
{ DBSC_DBSCHQOS133, 0x00000040U },
{ DBSC_DBSCHQOS140, 0x000000C0U },
{ DBSC_DBSCHQOS141, 0x000000B0U },
{ DBSC_DBSCHQOS142, 0x00000080U },
{ DBSC_DBSCHQOS143, 0x00000040U },
{ DBSC_DBSCHQOS150, 0x00000040U },
{ DBSC_DBSCHQOS151, 0x00000030U },
{ DBSC_DBSCHQOS152, 0x00000020U },
{ DBSC_DBSCHQOS153, 0x00000010U },
};
void qos_init_g2e_v10(void)
{
rzg_qos_dbsc_setting(g2e_qos, ARRAY_SIZE(g2e_qos), true);
/* DRAM Split Address mapping */
#if RCAR_DRAM_SPLIT == RCAR_DRAM_SPLIT_4CH
#if RCAR_LSI == RCAR_RZ_G2E
#error "Don't set DRAM Split 4ch(G2E)"
#else
ERROR("DRAM Split 4ch not supported.(G2E)");
panic();
#endif
#elif (RCAR_DRAM_SPLIT == RCAR_DRAM_SPLIT_2CH)
#if RCAR_LSI == RCAR_RZ_G2E
#error "Don't set DRAM Split 2ch(G2E)"
#else
ERROR("DRAM Split 2ch not supported.(G2E)");
panic();
#endif
#else
NOTICE("BL2: DRAM Split is OFF\n");
#endif
#if !(RCAR_QOS_TYPE == RCAR_QOS_NONE)
#if RCAR_QOS_TYPE == RCAR_QOS_TYPE_DEFAULT
NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION);
#endif
#if RCAR_REF_INT == RCAR_REF_DEFAULT
NOTICE("BL2: DRAM refresh interval 3.9 usec\n");
#else
NOTICE("BL2: DRAM refresh interval 7.8 usec\n");
#endif
mmio_write_32(QOSCTRL_RAS, 0x00000020U);
mmio_write_64(QOSCTRL_DANN, 0x0404020002020201UL);
mmio_write_32(QOSCTRL_DANT, 0x00100804U);
mmio_write_32(QOSCTRL_FSS, 0x0000000AU);
mmio_write_32(QOSCTRL_INSFC, 0x06330001U);
mmio_write_32(QOSCTRL_EARLYR, 0x00000000U);
mmio_write_32(QOSCTRL_RACNT0, 0x00010003U);
mmio_write_32(QOSCTRL_SL_INIT, SL_INIT_REFFSSLOT |
SL_INIT_SLOTSSLOT | SL_INIT_SSLOTCLK_G2E);
mmio_write_32(QOSCTRL_REF_ARS, REF_ARS_ARBSTOPCYCLE_G2E);
/* QOSBW SRAM setting */
uint32_t i;
for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
mmio_write_64(QOSBW_FIX_QOS_BANK0 + i * 8U, mstat_fix[i]);
mmio_write_64(QOSBW_FIX_QOS_BANK1 + i * 8U, mstat_fix[i]);
}
for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
mmio_write_64(QOSBW_BE_QOS_BANK0 + i * 8U, mstat_be[i]);
mmio_write_64(QOSBW_BE_QOS_BANK1 + i * 8U, mstat_be[i]);
}
/* RT bus Leaf setting */
mmio_write_32(RT_ACT0, 0x00000000U);
mmio_write_32(RT_ACT1, 0x00000000U);
/* CCI bus Leaf setting */
mmio_write_32(CPU_ACT0, 0x00000003U);
mmio_write_32(CPU_ACT1, 0x00000003U);
mmio_write_32(QOSCTRL_RAEN, 0x00000001U);
mmio_write_32(QOSCTRL_STATQC, 0x00000001U);
#else
NOTICE("BL2: QoS is None\n");
mmio_write_32(QOSCTRL_RAEN, 0x00000001U);
#endif
}

12
drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10.h Normal file
View File

@ -0,0 +1,12 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef QOS_INIT_G2E_V10_H
#define QOS_INIT_G2E_V10_H
void qos_init_g2e_v10(void);
#endif /* QOS_INIT_G2E_V10_H */

245
drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10_mstat390.h Normal file
View File

@ -0,0 +1,245 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef QOS_INIT_G2E_V10_MSTAT390_H
#define QOS_INIT_G2E_V10_MSTAT390_H
static uint64_t mstat_fix[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0000000000000000UL,
/* 0x0030, */ 0x001008620000FFFFUL,
/* 0x0038, */ 0x001008620000FFFFUL,
/* 0x0040, */ 0x0000000000000000UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x001415260000FFFFUL,
/* 0x0060, */ 0x001415260000FFFFUL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x001414930000FFFFUL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x000C08380000FFFFUL,
/* 0x00a8, */ 0x000C04110000FFFFUL,
/* 0x00b0, */ 0x000C04150000FFFFUL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x000C08380000FFFFUL,
/* 0x00c8, */ 0x000C04110000FFFFUL,
/* 0x00d0, */ 0x000C04150000FFFFUL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x000C084F0000FFFFUL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x000C21E40000FFFFUL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x001008530000FFFFUL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x00100C960000FFFFUL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x001008530000FFFFUL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0010042A0000FFFFUL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x00101D8D0000FFFFUL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x001008530000FFFFUL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x000C04010000FFFFUL,
/* 0x01c8, */ 0x000C04010000FFFFUL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0000000000000000UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0000000000000000UL,
/* 0x0218, */ 0x0000000000000000UL,
/* 0x0220, */ 0x0000000000000000UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0000000000000000UL,
/* 0x0238, */ 0x0000000000000000UL,
/* 0x0240, */ 0x0000000000000000UL,
/* 0x0248, */ 0x0000000000000000UL,
/* 0x0250, */ 0x0000000000000000UL,
/* 0x0258, */ 0x0000000000000000UL,
/* 0x0260, */ 0x0000000000000000UL,
/* 0x0268, */ 0x001410040000FFFFUL,
/* 0x0270, */ 0x001404020000FFFFUL,
/* 0x0278, */ 0x0000000000000000UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x001410040000FFFFUL,
/* 0x0298, */ 0x001404020000FFFFUL,
/* 0x02a0, */ 0x000C04090000FFFFUL,
/* 0x02a8, */ 0x000C04090000FFFFUL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x000C04090000FFFFUL,
/* 0x02d8, */ 0x000C04090000FFFFUL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x0000000000000000UL,
/* 0x02f8, */ 0x0000000000000000UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0000000000000000UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0000000000000000UL,
/* 0x0370, */ 0x000C04020000FFFFUL,
/* 0x0378, */ 0x000C04020000FFFFUL,
/* 0x0380, */ 0x000C04090000FFFFUL,
/* 0x0388, */ 0x000C04090000FFFFUL,
/* 0x0390, */ 0x0000000000000000UL,
};
static uint64_t mstat_be[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0012001005F03401UL,
/* 0x0030, */ 0x0000000000000000UL,
/* 0x0038, */ 0x0000000000000000UL,
/* 0x0040, */ 0x0000000000000000UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x0000000000000000UL,
/* 0x0060, */ 0x0000000000000000UL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x0000000000000000UL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x0000000000000000UL,
/* 0x00a8, */ 0x0000000000000000UL,
/* 0x00b0, */ 0x0000000000000000UL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x0000000000000000UL,
/* 0x00c8, */ 0x0000000000000000UL,
/* 0x00d0, */ 0x0000000000000000UL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x0000000000000000UL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x0000000000000000UL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0000000000000000UL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0000000000000000UL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0000000000000000UL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0000000000000000UL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x0000000000000000UL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0000000000000000UL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x0021060005FFFC01UL,
/* 0x01c8, */ 0x0021060005FFFC01UL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0000000000000000UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0000000000000000UL,
/* 0x0218, */ 0x0011010005F79801UL,
/* 0x0220, */ 0x0011010005F79801UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0011010005F79801UL,
/* 0x0238, */ 0x0011010005F79801UL,
/* 0x0240, */ 0x0012010005F79801UL,
/* 0x0248, */ 0x0011010005F79801UL,
/* 0x0250, */ 0x0012010005F79801UL,
/* 0x0258, */ 0x0011010005F79801UL,
/* 0x0260, */ 0x0000000000000000UL,
/* 0x0268, */ 0x0000000000000000UL,
/* 0x0270, */ 0x0000000000000000UL,
/* 0x0278, */ 0x0000000000000000UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x0000000000000000UL,
/* 0x0298, */ 0x0000000000000000UL,
/* 0x02a0, */ 0x0000000000000000UL,
/* 0x02a8, */ 0x0000000000000000UL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x0000000000000000UL,
/* 0x02d8, */ 0x0000000000000000UL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x0011060005FFFC01UL,
/* 0x02f8, */ 0x0011060005FFFC01UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0012001005F03401UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0012060005FFFC01UL,
/* 0x0360, */ 0x0012060005FFFC01UL,
/* 0x0368, */ 0x0012001005F03401UL,
/* 0x0370, */ 0x0000000000000000UL,
/* 0x0378, */ 0x0000000000000000UL,
/* 0x0380, */ 0x0000000000000000UL,
/* 0x0388, */ 0x0000000000000000UL,
/* 0x0390, */ 0x0012001005F03401UL,
};
#endif /* QOS_INIT_G2E_V10_MSTAT390_H */

246
drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10_mstat780.h Normal file
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@ -0,0 +1,246 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef QOS_INIT_G2E_V10_MSTAT780_H
#define QOS_INIT_G2E_V10_MSTAT780_H
static uint64_t mstat_fix[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0000000000000000UL,
/* 0x0030, */ 0x001010C40000FFFFUL,
/* 0x0038, */ 0x001010C40000FFFFUL,
/* 0x0040, */ 0x0000000000000000UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x00142A4B0000FFFFUL,
/* 0x0060, */ 0x00142A4B0000FFFFUL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x001429260000FFFFUL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x000C10700000FFFFUL,
/* 0x00a8, */ 0x000C08210000FFFFUL,
/* 0x00b0, */ 0x000C082A0000FFFFUL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x000C10700000FFFFUL,
/* 0x00c8, */ 0x000C08210000FFFFUL,
/* 0x00d0, */ 0x000C082A0000FFFFUL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x00102CAF0000FFFFUL,
/* 0x00f8, */ 0x000C0C9D0000FFFFUL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x00100CAF0000FFFFUL,
/* 0x0118, */ 0x000C43C80000FFFFUL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x00100CA50000FFFFUL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0010152C0000FFFFUL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x00100CA50000FFFFUL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x001008530000FFFFUL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x001037190000FFFFUL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x00100CA50000FFFFUL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x000C04010000FFFFUL,
/* 0x01c8, */ 0x000C04010000FFFFUL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x000C04040000FFFFUL,
/* 0x01f0, */ 0x000C08110000FFFFUL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x000C04110000FFFFUL,
/* 0x0210, */ 0x000C08110000FFFFUL,
/* 0x0218, */ 0x0000000000000000UL,
/* 0x0220, */ 0x0000000000000000UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0000000000000000UL,
/* 0x0238, */ 0x0000000000000000UL,
/* 0x0240, */ 0x0000000000000000UL,
/* 0x0248, */ 0x0000000000000000UL,
/* 0x0250, */ 0x0000000000000000UL,
/* 0x0258, */ 0x0000000000000000UL,
/* 0x0260, */ 0x000C18530000FFFFUL,
/* 0x0268, */ 0x00141C070000FFFFUL,
/* 0x0270, */ 0x001404040000FFFFUL,
/* 0x0278, */ 0x000C0C210000FFFFUL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x00141C070000FFFFUL,
/* 0x0298, */ 0x001404040000FFFFUL,
/* 0x02a0, */ 0x000C04110000FFFFUL,
/* 0x02a8, */ 0x000C04110000FFFFUL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x000C04040000FFFFUL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x000C04110000FFFFUL,
/* 0x02d8, */ 0x000C04110000FFFFUL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x000C04040000FFFFUL,
/* 0x02f0, */ 0x0000000000000000UL,
/* 0x02f8, */ 0x0000000000000000UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0000000000000000UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0000000000000000UL,
/* 0x0370, */ 0x000C04040000FFFFUL,
/* 0x0378, */ 0x000C04040000FFFFUL,
/* 0x0380, */ 0x000C04110000FFFFUL,
/* 0x0388, */ 0x000C04110000FFFFUL,
/* 0x0390, */ 0x0000000000000000UL,
};
static uint64_t mstat_be[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0012001002F03401UL,
/* 0x0030, */ 0x0000000000000000UL,
/* 0x0038, */ 0x0000000000000000UL,
/* 0x0040, */ 0x0000000000000000UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x0000000000000000UL,
/* 0x0060, */ 0x0000000000000000UL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x0000000000000000UL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x0000000000000000UL,
/* 0x00a8, */ 0x0000000000000000UL,
/* 0x00b0, */ 0x0000000000000000UL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x0000000000000000UL,
/* 0x00c8, */ 0x0000000000000000UL,
/* 0x00d0, */ 0x0000000000000000UL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x0000000000000000UL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x0000000000000000UL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0000000000000000UL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0000000000000000UL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0000000000000000UL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0000000000000000UL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x0000000000000000UL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0000000000000000UL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x0021060002FFFC01UL,
/* 0x01c8, */ 0x0021060002FFFC01UL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0021010002F3CC01UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0021010002F3CC01UL,
/* 0x0218, */ 0x0011010002F3CC01UL,
/* 0x0220, */ 0x0011010002F3CC01UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0011010002F3CC01UL,
/* 0x0238, */ 0x0011010002F3CC01UL,
/* 0x0240, */ 0x0012010002F3CC01UL,
/* 0x0248, */ 0x0011010002F3CC01UL,
/* 0x0250, */ 0x0012010002F3CC01UL,
/* 0x0258, */ 0x0011010002F3CC01UL,
/* 0x0260, */ 0x0000000000000000UL,
/* 0x0268, */ 0x0000000000000000UL,
/* 0x0270, */ 0x0000000000000000UL,
/* 0x0278, */ 0x0000000000000000UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x0000000000000000UL,
/* 0x0298, */ 0x0000000000000000UL,
/* 0x02a0, */ 0x0000000000000000UL,
/* 0x02a8, */ 0x0000000000000000UL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x0000000000000000UL,
/* 0x02d8, */ 0x0000000000000000UL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x0011060002FFFC01UL,
/* 0x02f8, */ 0x0011060002FFFC01UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0012001002F03401UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0012060002FFFC01UL,
/* 0x0360, */ 0x0012060002FFFC01UL,
/* 0x0368, */ 0x0012001002F03401UL,
/* 0x0370, */ 0x0000000000000000UL,
/* 0x0378, */ 0x0000000000000000UL,
/* 0x0380, */ 0x0000000000000000UL,
/* 0x0388, */ 0x0000000000000000UL,
/* 0x0390, */ 0x0012001002F03401UL,
};
#endif /* QOS_INIT_G2E_V10_MSTAT780_H */

236
drivers/renesas/rzg/qos/G2H/qos_init_g2h_mstat195.h Normal file
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@ -0,0 +1,236 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef QOS_INIT_G2H_MSTAT195_H
#define QOS_INIT_G2H_MSTAT195_H
static uint64_t mstat_fix[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0000000000000000UL,
/* 0x0030, */ 0x001004040000FFFFUL,
/* 0x0038, */ 0x001008070000FFFFUL,
/* 0x0040, */ 0x001410070000FFFFUL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x001404010000FFFFUL,
/* 0x0058, */ 0x0014100D0000FFFFUL,
/* 0x0060, */ 0x0014100D0000FFFFUL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x001404010000FFFFUL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x001410070000FFFFUL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x000C04020000FFFFUL,
/* 0x00a8, */ 0x000C04010000FFFFUL,
/* 0x00b0, */ 0x000C04010000FFFFUL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x000C04020000FFFFUL,
/* 0x00c8, */ 0x000C04010000FFFFUL,
/* 0x00d0, */ 0x000C04010000FFFFUL,
/* 0x00d8, */ 0x001024090000FFFFUL,
/* 0x00e0, */ 0x00100C090000FFFFUL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x001024090000FFFFUL,
/* 0x00f8, */ 0x000C100D0000FFFFUL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x00100C090000FFFFUL,
/* 0x0118, */ 0x000C1C1B0000FFFFUL,
/* 0x0120, */ 0x000C1C1B0000FFFFUL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x00100C0B0000FFFFUL,
/* 0x0140, */ 0x00100C0B0000FFFFUL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0010100D0000FFFFUL,
/* 0x0158, */ 0x0010100D0000FFFFUL,
/* 0x0160, */ 0x00100C0B0000FFFFUL,
/* 0x0168, */ 0x00100C0B0000FFFFUL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x001008060000FFFFUL,
/* 0x0180, */ 0x001008060000FFFFUL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x00102C2C0000FFFFUL,
/* 0x0198, */ 0x00102C2C0000FFFFUL,
/* 0x01a0, */ 0x00100C0B0000FFFFUL,
/* 0x01a8, */ 0x00100C0B0000FFFFUL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x000C04010000FFFFUL,
/* 0x01c8, */ 0x000C04010000FFFFUL,
/* 0x01d0, */ 0x000C04010000FFFFUL,
/* 0x01d8, */ 0x000C04010000FFFFUL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x000C04010000FFFFUL,
/* 0x01f0, */ 0x000C04010000FFFFUL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x000C04010000FFFFUL,
/* 0x0210, */ 0x000C04010000FFFFUL,
/* 0x0218, */ 0x0000000000000000UL,
/* 0x0220, */ 0x0000000000000000UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0000000000000000UL,
/* 0x0238, */ 0x0000000000000000UL,
/* 0x0240, */ 0x0000000000000000UL,
/* 0x0248, */ 0x0000000000000000UL,
/* 0x0250, */ 0x0000000000000000UL,
/* 0x0258, */ 0x0000000000000000UL,
/* 0x0260, */ 0x000C08020000FFFFUL,
/* 0x0268, */ 0x001408010000FFFFUL,
/* 0x0270, */ 0x001404010000FFFFUL,
/* 0x0278, */ 0x000C04010000FFFFUL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x001408010000FFFFUL,
/* 0x0298, */ 0x001404010000FFFFUL,
/* 0x02a0, */ 0x000C04010000FFFFUL,
/* 0x02a8, */ 0x000C04010000FFFFUL,
/* 0x02b0, */ 0x001408010000FFFFUL,
/* 0x02b8, */ 0x000C04010000FFFFUL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x000C04010000FFFFUL,
/* 0x02d8, */ 0x000C04010000FFFFUL,
/* 0x02e0, */ 0x001408010000FFFFUL,
/* 0x02e8, */ 0x000C04010000FFFFUL,
/* 0x02f0, */ 0x0000000000000000UL,
/* 0x02f8, */ 0x0000000000000000UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0000000000000000UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0000000000000000UL,
};
static uint64_t mstat_be[] = {
/* 0x0000, */ 0x001200600BDFFC01UL,
/* 0x0008, */ 0x001200600BDFFC01UL,
/* 0x0010, */ 0x001200600BDFFC01UL,
/* 0x0018, */ 0x001200600BDFFC01UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x001200100BD0FC01UL,
/* 0x0030, */ 0x0000000000000000UL,
/* 0x0038, */ 0x0000000000000000UL,
/* 0x0040, */ 0x0000000000000000UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x0000000000000000UL,
/* 0x0060, */ 0x0000000000000000UL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x0000000000000000UL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x0000000000000000UL,
/* 0x00a8, */ 0x0000000000000000UL,
/* 0x00b0, */ 0x0000000000000000UL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x0000000000000000UL,
/* 0x00c8, */ 0x0000000000000000UL,
/* 0x00d0, */ 0x0000000000000000UL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x0000000000000000UL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x0000000000000000UL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0000000000000000UL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0000000000000000UL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0000000000000000UL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0000000000000000UL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x0000000000000000UL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0000000000000000UL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x002100600BDFFC01UL,
/* 0x01c8, */ 0x002100600BDFFC01UL,
/* 0x01d0, */ 0x002100600BDFFC01UL,
/* 0x01d8, */ 0x002100600BDFFC01UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x002100100BDF2401UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x002100100BDF2401UL,
/* 0x0218, */ 0x001100100BDF2401UL,
/* 0x0220, */ 0x001100100BDF2401UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x001100100BDF2401UL,
/* 0x0238, */ 0x001100100BDF2401UL,
/* 0x0240, */ 0x001200100BDF2401UL,
/* 0x0248, */ 0x001100100BDF2401UL,
/* 0x0250, */ 0x001200100BDF2401UL,
/* 0x0258, */ 0x001100100BDF2401UL,
/* 0x0260, */ 0x0000000000000000UL,
/* 0x0268, */ 0x0000000000000000UL,
/* 0x0270, */ 0x0000000000000000UL,
/* 0x0278, */ 0x0000000000000000UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x0000000000000000UL,
/* 0x0298, */ 0x0000000000000000UL,
/* 0x02a0, */ 0x0000000000000000UL,
/* 0x02a8, */ 0x0000000000000000UL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x0000000000000000UL,
/* 0x02d8, */ 0x0000000000000000UL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x001100600BDFFC01UL,
/* 0x02f8, */ 0x001100600BDFFC01UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x001100600BDFFC01UL,
/* 0x0310, */ 0x001100600BDFFC01UL,
/* 0x0318, */ 0x001200100BD03401UL,
/* 0x0320, */ 0x001100600BDFFC01UL,
/* 0x0328, */ 0x001100600BDFFC01UL,
/* 0x0330, */ 0x001100600BDFFC01UL,
/* 0x0338, */ 0x001100600BDFFC01UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x001200100BD0FC01UL,
};
#endif /* QOS_INIT_G2H_MSTAT195_H */

236
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@ -0,0 +1,236 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef QOS_INIT_G2H_MSTAT390_H
#define QOS_INIT_G2H_MSTAT390_H
static uint64_t mstat_fix[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0000000000000000UL,
/* 0x0030, */ 0x001008070000FFFFUL,
/* 0x0038, */ 0x0010100D0000FFFFUL,
/* 0x0040, */ 0x00141C0E0000FFFFUL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x001408010000FFFFUL,
/* 0x0058, */ 0x00141C190000FFFFUL,
/* 0x0060, */ 0x00141C190000FFFFUL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x001408010000FFFFUL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x00141C0E0000FFFFUL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x000C08040000FFFFUL,
/* 0x00a8, */ 0x000C04020000FFFFUL,
/* 0x00b0, */ 0x000C04020000FFFFUL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x000C08040000FFFFUL,
/* 0x00c8, */ 0x000C04020000FFFFUL,
/* 0x00d0, */ 0x000C04020000FFFFUL,
/* 0x00d8, */ 0x001044110000FFFFUL,
/* 0x00e0, */ 0x001014110000FFFFUL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x001044110000FFFFUL,
/* 0x00f8, */ 0x000C1C1A0000FFFFUL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x001014110000FFFFUL,
/* 0x0118, */ 0x000C38360000FFFFUL,
/* 0x0120, */ 0x000C38360000FFFFUL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x001018150000FFFFUL,
/* 0x0140, */ 0x001018150000FFFFUL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x00101C190000FFFFUL,
/* 0x0158, */ 0x00101C190000FFFFUL,
/* 0x0160, */ 0x001018150000FFFFUL,
/* 0x0168, */ 0x001018150000FFFFUL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x00100C0B0000FFFFUL,
/* 0x0180, */ 0x00100C0B0000FFFFUL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x001058570000FFFFUL,
/* 0x0198, */ 0x001058570000FFFFUL,
/* 0x01a0, */ 0x001018150000FFFFUL,
/* 0x01a8, */ 0x001018150000FFFFUL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x000C04010000FFFFUL,
/* 0x01c8, */ 0x000C04010000FFFFUL,
/* 0x01d0, */ 0x000C04010000FFFFUL,
/* 0x01d8, */ 0x000C04010000FFFFUL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x000C04010000FFFFUL,
/* 0x01f0, */ 0x000C04010000FFFFUL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x000C04010000FFFFUL,
/* 0x0210, */ 0x000C04010000FFFFUL,
/* 0x0218, */ 0x0000000000000000UL,
/* 0x0220, */ 0x0000000000000000UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0000000000000000UL,
/* 0x0238, */ 0x0000000000000000UL,
/* 0x0240, */ 0x0000000000000000UL,
/* 0x0248, */ 0x0000000000000000UL,
/* 0x0250, */ 0x0000000000000000UL,
/* 0x0258, */ 0x0000000000000000UL,
/* 0x0260, */ 0x000C0C030000FFFFUL,
/* 0x0268, */ 0x001410010000FFFFUL,
/* 0x0270, */ 0x001404010000FFFFUL,
/* 0x0278, */ 0x000C08020000FFFFUL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x001410010000FFFFUL,
/* 0x0298, */ 0x001404010000FFFFUL,
/* 0x02a0, */ 0x000C04010000FFFFUL,
/* 0x02a8, */ 0x000C04010000FFFFUL,
/* 0x02b0, */ 0x00140C010000FFFFUL,
/* 0x02b8, */ 0x000C04010000FFFFUL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x000C04010000FFFFUL,
/* 0x02d8, */ 0x000C04010000FFFFUL,
/* 0x02e0, */ 0x00140C010000FFFFUL,
/* 0x02e8, */ 0x000C04010000FFFFUL,
/* 0x02f0, */ 0x0000000000000000UL,
/* 0x02f8, */ 0x0000000000000000UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0000000000000000UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0000000000000000UL,
};
static uint64_t mstat_be[] = {
/* 0x0000, */ 0x0012006005EFFC01UL,
/* 0x0008, */ 0x0012006005EFFC01UL,
/* 0x0010, */ 0x0012006005EFFC01UL,
/* 0x0018, */ 0x0012006005EFFC01UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0012001005E0FC01UL,
/* 0x0030, */ 0x0000000000000000UL,
/* 0x0038, */ 0x0000000000000000UL,
/* 0x0040, */ 0x0000000000000000UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x0000000000000000UL,
/* 0x0060, */ 0x0000000000000000UL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x0000000000000000UL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x0000000000000000UL,
/* 0x00a8, */ 0x0000000000000000UL,
/* 0x00b0, */ 0x0000000000000000UL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x0000000000000000UL,
/* 0x00c8, */ 0x0000000000000000UL,
/* 0x00d0, */ 0x0000000000000000UL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x0000000000000000UL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x0000000000000000UL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0000000000000000UL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0000000000000000UL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0000000000000000UL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0000000000000000UL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x0000000000000000UL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0000000000000000UL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x0021006005EFFC01UL,
/* 0x01c8, */ 0x0021006005EFFC01UL,
/* 0x01d0, */ 0x0021006005EFFC01UL,
/* 0x01d8, */ 0x0021006005EFFC01UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0021001005E79401UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0021001005E79401UL,
/* 0x0218, */ 0x0011001005E79401UL,
/* 0x0220, */ 0x0011001005E79401UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0011001005E79401UL,
/* 0x0238, */ 0x0011001005E79401UL,
/* 0x0240, */ 0x0012001005E79401UL,
/* 0x0248, */ 0x0011001005E79401UL,
/* 0x0250, */ 0x0012001005E79401UL,
/* 0x0258, */ 0x0011001005E79401UL,
/* 0x0260, */ 0x0000000000000000UL,
/* 0x0268, */ 0x0000000000000000UL,
/* 0x0270, */ 0x0000000000000000UL,
/* 0x0278, */ 0x0000000000000000UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x0000000000000000UL,
/* 0x0298, */ 0x0000000000000000UL,
/* 0x02a0, */ 0x0000000000000000UL,
/* 0x02a8, */ 0x0000000000000000UL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x0000000000000000UL,
/* 0x02d8, */ 0x0000000000000000UL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x0011006005EFFC01UL,
/* 0x02f8, */ 0x0011006005EFFC01UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0011006005EFFC01UL,
/* 0x0310, */ 0x0011006005EFFC01UL,
/* 0x0318, */ 0x0012001005E03401UL,
/* 0x0320, */ 0x0011006005EFFC01UL,
/* 0x0328, */ 0x0011006005EFFC01UL,
/* 0x0330, */ 0x0011006005EFFC01UL,
/* 0x0338, */ 0x0011006005EFFC01UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0012001005E0FC01UL,
};
#endif /* QOS_INIT_G2H_MSTAT390_H */

236
drivers/renesas/rzg/qos/G2H/qos_init_g2h_qoswt195.h Normal file
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@ -0,0 +1,236 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef QOS_INIT_G2H_QOSWT195_H
#define QOS_INIT_G2H_QOSWT195_H
static uint64_t qoswt_fix[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0000000000000000UL,
/* 0x0030, */ 0x001004040000C010UL,
/* 0x0038, */ 0x001008070000C010UL,
/* 0x0040, */ 0x001410070000FFF0UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x0014100D0000C010UL,
/* 0x0060, */ 0x0014100D0000C010UL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x001410070000FFF0UL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x0000000000000000UL,
/* 0x00a8, */ 0x0000000000000000UL,
/* 0x00b0, */ 0x0000000000000000UL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x0000000000000000UL,
/* 0x00c8, */ 0x0000000000000000UL,
/* 0x00d0, */ 0x0000000000000000UL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x0000000000000000UL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x0000000000000000UL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0000000000000000UL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0000000000000000UL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0000000000000000UL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0000000000000000UL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x0000000000000000UL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0000000000000000UL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x0000000000000000UL,
/* 0x01c8, */ 0x0000000000000000UL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0000000000000000UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0000000000000000UL,
/* 0x0218, */ 0x0000000000000000UL,
/* 0x0220, */ 0x0000000000000000UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0000000000000000UL,
/* 0x0238, */ 0x0000000000000000UL,
/* 0x0240, */ 0x0000000000000000UL,
/* 0x0248, */ 0x0000000000000000UL,
/* 0x0250, */ 0x0000000000000000UL,
/* 0x0258, */ 0x0000000000000000UL,
/* 0x0260, */ 0x000C08020000FFF0UL,
/* 0x0268, */ 0x001408010000FFF0UL,
/* 0x0270, */ 0x001404010000FFF0UL,
/* 0x0278, */ 0x000C04010000FFF0UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x001408010000FFF0UL,
/* 0x0298, */ 0x001404010000FFF0UL,
/* 0x02a0, */ 0x0000000000000000UL,
/* 0x02a8, */ 0x0000000000000000UL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x0000000000000000UL,
/* 0x02d8, */ 0x0000000000000000UL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x0000000000000000UL,
/* 0x02f8, */ 0x0000000000000000UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0000000000000000UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0000000000000000UL,
};
static uint64_t qoswt_be[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0000000000000000UL,
/* 0x0030, */ 0x0000000000000000UL,
/* 0x0038, */ 0x0000000000000000UL,
/* 0x0040, */ 0x0000000000000000UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x0000000000000000UL,
/* 0x0060, */ 0x0000000000000000UL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x0000000000000000UL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x0000000000000000UL,
/* 0x00a8, */ 0x0000000000000000UL,
/* 0x00b0, */ 0x0000000000000000UL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x0000000000000000UL,
/* 0x00c8, */ 0x0000000000000000UL,
/* 0x00d0, */ 0x0000000000000000UL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x0000000000000000UL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x0000000000000000UL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0000000000000000UL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0000000000000000UL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0000000000000000UL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0000000000000000UL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x0000000000000000UL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0000000000000000UL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x0000000000000000UL,
/* 0x01c8, */ 0x0000000000000000UL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0000000000000000UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0000000000000000UL,
/* 0x0218, */ 0x0000000000000000UL,
/* 0x0220, */ 0x0000000000000000UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0000000000000000UL,
/* 0x0238, */ 0x0000000000000000UL,
/* 0x0240, */ 0x0000000000000000UL,
/* 0x0248, */ 0x0000000000000000UL,
/* 0x0250, */ 0x0000000000000000UL,
/* 0x0258, */ 0x0000000000000000UL,
/* 0x0260, */ 0x0000000000000000UL,
/* 0x0268, */ 0x0000000000000000UL,
/* 0x0270, */ 0x0000000000000000UL,
/* 0x0278, */ 0x0000000000000000UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x0000000000000000UL,
/* 0x0298, */ 0x0000000000000000UL,
/* 0x02a0, */ 0x0000000000000000UL,
/* 0x02a8, */ 0x0000000000000000UL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x0000000000000000UL,
/* 0x02d8, */ 0x0000000000000000UL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x0000000000000000UL,
/* 0x02f8, */ 0x0000000000000000UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0000000000000000UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0000000000000000UL,
};
#endif /* QOS_INIT_G2H_QOSWT195_H */

236
drivers/renesas/rzg/qos/G2H/qos_init_g2h_qoswt390.h Normal file
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@ -0,0 +1,236 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef QOS_INIT_G2H_QOSWT390_H
#define QOS_INIT_G2H_QOSWT390_H
static uint64_t qoswt_fix[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0000000000000000UL,
/* 0x0030, */ 0x001008070000C010UL,
/* 0x0038, */ 0x0010100D0000C010UL,
/* 0x0040, */ 0x00141C0E0000FFF0UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x00141C190000C010UL,
/* 0x0060, */ 0x00141C190000C010UL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x00141C0E0000FFF0UL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x0000000000000000UL,
/* 0x00a8, */ 0x0000000000000000UL,
/* 0x00b0, */ 0x0000000000000000UL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x0000000000000000UL,
/* 0x00c8, */ 0x0000000000000000UL,
/* 0x00d0, */ 0x0000000000000000UL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x0000000000000000UL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x0000000000000000UL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0000000000000000UL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0000000000000000UL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0000000000000000UL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0000000000000000UL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x0000000000000000UL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0000000000000000UL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x0000000000000000UL,
/* 0x01c8, */ 0x0000000000000000UL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0000000000000000UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0000000000000000UL,
/* 0x0218, */ 0x0000000000000000UL,
/* 0x0220, */ 0x0000000000000000UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0000000000000000UL,
/* 0x0238, */ 0x0000000000000000UL,
/* 0x0240, */ 0x0000000000000000UL,
/* 0x0248, */ 0x0000000000000000UL,
/* 0x0250, */ 0x0000000000000000UL,
/* 0x0258, */ 0x0000000000000000UL,
/* 0x0260, */ 0x000C0C030000FFF0UL,
/* 0x0268, */ 0x001410010000FFF0UL,
/* 0x0270, */ 0x001404010000FFF0UL,
/* 0x0278, */ 0x000C08020000FFF0UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x001410010000FFF0UL,
/* 0x0298, */ 0x001404010000FFF0UL,
/* 0x02a0, */ 0x0000000000000000UL,
/* 0x02a8, */ 0x0000000000000000UL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x0000000000000000UL,
/* 0x02d8, */ 0x0000000000000000UL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x0000000000000000UL,
/* 0x02f8, */ 0x0000000000000000UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0000000000000000UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0000000000000000UL,
};
static uint64_t qoswt_be[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0000000000000000UL,
/* 0x0030, */ 0x0000000000000000UL,
/* 0x0038, */ 0x0000000000000000UL,
/* 0x0040, */ 0x0000000000000000UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x0000000000000000UL,
/* 0x0060, */ 0x0000000000000000UL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x0000000000000000UL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x0000000000000000UL,
/* 0x00a8, */ 0x0000000000000000UL,
/* 0x00b0, */ 0x0000000000000000UL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x0000000000000000UL,
/* 0x00c8, */ 0x0000000000000000UL,
/* 0x00d0, */ 0x0000000000000000UL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x0000000000000000UL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x0000000000000000UL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0000000000000000UL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0000000000000000UL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0000000000000000UL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0000000000000000UL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x0000000000000000UL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0000000000000000UL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x0000000000000000UL,
/* 0x01c8, */ 0x0000000000000000UL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0000000000000000UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0000000000000000UL,
/* 0x0218, */ 0x0000000000000000UL,
/* 0x0220, */ 0x0000000000000000UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0000000000000000UL,
/* 0x0238, */ 0x0000000000000000UL,
/* 0x0240, */ 0x0000000000000000UL,
/* 0x0248, */ 0x0000000000000000UL,
/* 0x0250, */ 0x0000000000000000UL,
/* 0x0258, */ 0x0000000000000000UL,
/* 0x0260, */ 0x0000000000000000UL,
/* 0x0268, */ 0x0000000000000000UL,
/* 0x0270, */ 0x0000000000000000UL,
/* 0x0278, */ 0x0000000000000000UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x0000000000000000UL,
/* 0x0298, */ 0x0000000000000000UL,
/* 0x02a0, */ 0x0000000000000000UL,
/* 0x02a8, */ 0x0000000000000000UL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x0000000000000000UL,
/* 0x02d8, */ 0x0000000000000000UL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x0000000000000000UL,
/* 0x02f8, */ 0x0000000000000000UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0000000000000000UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0000000000000000UL,
};
#endif /* QOS_INIT_G2H_QOSWT390_H */

217
drivers/renesas/rzg/qos/G2H/qos_init_g2h_v30.c Normal file
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/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <stdint.h>
#include <common/debug.h>
#include <lib/mmio.h>
#include "qos_init_g2h_v30.h"
#include "../qos_common.h"
#include "../qos_reg.h"
#define RCAR_QOS_VERSION "rev.0.07"
#define QOSWT_TIME_BANK0 20000000U /* unit:ns */
#define QOSWT_WTEN_ENABLE 0x1U
#define QOSCTRL_REF_ARS_ARBSTOPCYCLE_G2H (SL_INIT_SSLOTCLK_G2H - 0x5U)
#define OSWT_WTREF_SLOT0_EN_REQ1_SLOT 3U
#define OSWT_WTREF_SLOT0_EN_REQ2_SLOT 9U
#define QOSWT_WTREF_SLOT0_EN ((0x1U << OSWT_WTREF_SLOT0_EN_REQ1_SLOT) | \
(0x1U << OSWT_WTREF_SLOT0_EN_REQ2_SLOT))
#define QOSWT_WTREF_SLOT1_EN ((0x1U << OSWT_WTREF_SLOT0_EN_REQ1_SLOT) | \
(0x1U << OSWT_WTREF_SLOT0_EN_REQ2_SLOT))
#define QOSWT_WTSET0_REQ_SSLOT0 5U
#define WT_BASE_SUB_SLOT_NUM0 12U
#define QOSWT_WTSET0_PERIOD0_G2H ((QOSWT_TIME_BANK0 / QOSWT_WTSET0_CYCLE_G2H) - 1U)
#define QOSWT_WTSET0_SSLOT0 (QOSWT_WTSET0_REQ_SSLOT0 - 1U)
#define QOSWT_WTSET0_SLOTSLOT0 (WT_BASE_SUB_SLOT_NUM0 - 1U)
#define QOSWT_WTSET1_PERIOD1_G2H (QOSWT_WTSET0_PERIOD0_G2H)
#define QOSWT_WTSET1_SSLOT1 (QOSWT_WTSET0_SSLOT0)
#define QOSWT_WTSET1_SLOTSLOT1 (QOSWT_WTSET0_SLOTSLOT0)
#if RCAR_QOS_TYPE == RCAR_QOS_TYPE_DEFAULT
#if RCAR_REF_INT == RCAR_REF_DEFAULT
#include "qos_init_g2h_mstat195.h"
#else
#include "qos_init_g2h_mstat390.h"
#endif /* RCAR_REF_INT == RCAR_REF_DEFAULT */
#if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
#if RCAR_REF_INT == RCAR_REF_DEFAULT
#include "qos_init_g2h_qoswt195.h"
#else
#include "qos_init_g2h_qoswt390.h"
#endif /* RCAR_REF_INT == RCAR_REF_DEFAULT */
#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
#endif /* RCAR_QOS_TYPE == RCAR_QOS_TYPE_DEFAULT */
static const struct rcar_gen3_dbsc_qos_settings g2h_v30_qos[] = {
/* BUFCAM settings */
{ DBSC_DBCAM0CNF1, 0x00043218U },
{ DBSC_DBCAM0CNF2, 0x000000F4U },
{ DBSC_DBCAM0CNF3, 0x00000000U },
{ DBSC_DBSCHCNT0, 0x000F0037U },
{ DBSC_DBSCHSZ0, 0x00000001U },
{ DBSC_DBSCHRW0, 0x22421111U },
/* DDR3 */
{ DBSC_SCFCTST2, 0x012F1123U },
/* QoS Settings */
{ DBSC_DBSCHQOS00, 0x00000F00U },
{ DBSC_DBSCHQOS01, 0x00000B00U },
{ DBSC_DBSCHQOS02, 0x00000000U },
{ DBSC_DBSCHQOS03, 0x00000000U },
{ DBSC_DBSCHQOS40, 0x00000300U },
{ DBSC_DBSCHQOS41, 0x000002F0U },
{ DBSC_DBSCHQOS42, 0x00000200U },
{ DBSC_DBSCHQOS43, 0x00000100U },
{ DBSC_DBSCHQOS90, 0x00000100U },
{ DBSC_DBSCHQOS91, 0x000000F0U },
{ DBSC_DBSCHQOS92, 0x000000A0U },
{ DBSC_DBSCHQOS93, 0x00000040U },
{ DBSC_DBSCHQOS120, 0x00000040U },
{ DBSC_DBSCHQOS121, 0x00000030U },
{ DBSC_DBSCHQOS122, 0x00000020U },
{ DBSC_DBSCHQOS123, 0x00000010U },
{ DBSC_DBSCHQOS130, 0x00000100U },
{ DBSC_DBSCHQOS131, 0x000000F0U },
{ DBSC_DBSCHQOS132, 0x000000A0U },
{ DBSC_DBSCHQOS133, 0x00000040U },
{ DBSC_DBSCHQOS140, 0x000000C0U },
{ DBSC_DBSCHQOS141, 0x000000B0U },
{ DBSC_DBSCHQOS142, 0x00000080U },
{ DBSC_DBSCHQOS143, 0x00000040U },
{ DBSC_DBSCHQOS150, 0x00000040U },
{ DBSC_DBSCHQOS151, 0x00000030U },
{ DBSC_DBSCHQOS152, 0x00000020U },
{ DBSC_DBSCHQOS153, 0x00000010U },
};
void qos_init_g2h_v30(void)
{
unsigned int split_area;
rzg_qos_dbsc_setting(g2h_v30_qos, ARRAY_SIZE(g2h_v30_qos), true);
/* use 1(2GB) for RCAR_DRAM_LPDDR4_MEMCONF for G2H */
split_area = 0x1CU;
/* DRAM split address mapping */
#if (RCAR_DRAM_SPLIT == RCAR_DRAM_SPLIT_4CH)
#if RCAR_LSI == RZ_G2H
#error "Don't set DRAM Split 4ch(G2H)"
#else /* RCAR_LSI == RZ_G2H */
ERROR("DRAM split 4ch not supported.(G2H)");
panic();
#endif /* RCAR_LSI == RZ_G2H */
#elif (RCAR_DRAM_SPLIT == RCAR_DRAM_SPLIT_2CH) || \
(RCAR_DRAM_SPLIT == RCAR_DRAM_SPLIT_AUTO)
NOTICE("BL2: DRAM Split is 2ch(DDR %x)\n", (int)qos_init_ddr_phyvalid);
mmio_write_32(AXI_ADSPLCR0, ADSPLCR0_AREA(split_area));
mmio_write_32(AXI_ADSPLCR1, ADSPLCR0_ADRMODE_DEFAULT |
ADSPLCR0_SPLITSEL(0xFFU) | ADSPLCR0_AREA(split_area) |
ADSPLCR0_SWP);
mmio_write_32(AXI_ADSPLCR2, 0x00001004U);
mmio_write_32(AXI_ADSPLCR3, 0x00000000U);
#else /* RCAR_DRAM_SPLIT == RCAR_DRAM_SPLIT_4CH */
mmio_write_32(AXI_ADSPLCR0, ADSPLCR0_AREA(split_area));
NOTICE("BL2: DRAM Split is OFF(DDR %x)\n", (int)qos_init_ddr_phyvalid);
#endif /* RCAR_DRAM_SPLIT == RCAR_DRAM_SPLIT_4CH */
#if !(RCAR_QOS_TYPE == RCAR_QOS_NONE)
#if RCAR_QOS_TYPE == RCAR_QOS_TYPE_DEFAULT
NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION);
#endif
#if RCAR_REF_INT == RCAR_REF_DEFAULT
NOTICE("BL2: DRAM refresh interval 1.95 usec\n");
#else
NOTICE("BL2: DRAM refresh interval 3.9 usec\n");
#endif
#if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
NOTICE("BL2: Periodic Write DQ Training\n");
#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
mmio_write_32(QOSCTRL_RAS, 0x00000044U);
mmio_write_64(QOSCTRL_DANN, 0x0404020002020201UL);
mmio_write_32(QOSCTRL_DANT, 0x0020100AU);
mmio_write_32(QOSCTRL_FSS, 0x0000000AU);
mmio_write_32(QOSCTRL_INSFC, 0x06330001U);
mmio_write_32(QOSCTRL_RACNT0, 0x00010003U);
/* GPU Boost Mode */
mmio_write_32(QOSCTRL_STATGEN0, 0x00000001U);
mmio_write_32(QOSCTRL_SL_INIT, SL_INIT_REFFSSLOT |
SL_INIT_SLOTSSLOT | SL_INIT_SSLOTCLK_G2H);
mmio_write_32(QOSCTRL_REF_ARS, ((QOSCTRL_REF_ARS_ARBSTOPCYCLE_G2H << 16)));
uint32_t i;
for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
mmio_write_64(QOSBW_FIX_QOS_BANK0 + i * 8U, mstat_fix[i]);
mmio_write_64(QOSBW_FIX_QOS_BANK1 + i * 8U, mstat_fix[i]);
}
for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
mmio_write_64(QOSBW_BE_QOS_BANK0 + i * 8U, mstat_be[i]);
mmio_write_64(QOSBW_BE_QOS_BANK1 + i * 8U, mstat_be[i]);
}
#if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
mmio_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8U, qoswt_fix[i]);
mmio_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8U, qoswt_fix[i]);
}
for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
mmio_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8U, qoswt_be[i]);
mmio_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8U, qoswt_be[i]);
}
#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
/* AXI setting */
mmio_write_32(AXI_MMCR, 0x00010008U);
mmio_write_32(AXI_TR3CR, 0x00010000U);
mmio_write_32(AXI_TR4CR, 0x00010000U);
/* RT bus Leaf setting */
mmio_write_32(RT_ACT0, 0x00000000U);
mmio_write_32(RT_ACT1, 0x00000000U);
/* CCI bus Leaf setting */
mmio_write_32(CPU_ACT0, 0x00000003U);
mmio_write_32(CPU_ACT1, 0x00000003U);
mmio_write_32(CPU_ACT2, 0x00000003U);
mmio_write_32(CPU_ACT3, 0x00000003U);
mmio_write_32(QOSCTRL_RAEN, 0x00000001U);
#if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
/* re-write training setting */
mmio_write_32(QOSWT_WTREF,
((QOSWT_WTREF_SLOT1_EN << 16) | QOSWT_WTREF_SLOT0_EN));
mmio_write_32(QOSWT_WTSET0,
((QOSWT_WTSET0_PERIOD0_G2H << 16) |
(QOSWT_WTSET0_SSLOT0 << 8) | QOSWT_WTSET0_SLOTSLOT0));
mmio_write_32(QOSWT_WTSET1,
((QOSWT_WTSET1_PERIOD1_G2H << 16) |
(QOSWT_WTSET1_SSLOT1 << 8) | QOSWT_WTSET1_SLOTSLOT1));
mmio_write_32(QOSWT_WTEN, QOSWT_WTEN_ENABLE);
#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
mmio_write_32(QOSCTRL_STATQC, 0x00000001U);
#else
NOTICE("BL2: QoS is None\n");
mmio_write_32(QOSCTRL_RAEN, 0x00000001U);
#endif /* !(RCAR_QOS_TYPE == RCAR_QOS_NONE) */
}

12
drivers/renesas/rzg/qos/G2H/qos_init_g2h_v30.h Normal file
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/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef QOS_INIT_G2H_V30_H
#define QOS_INIT_G2H_V30_H
void qos_init_g2h_v30(void);
#endif /* QOS_INIT_G2H_V30_H */

196
drivers/renesas/rzg/qos/G2N/qos_init_g2n_v10.c Normal file
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/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <stdint.h>
#include <common/debug.h>
#include <lib/mmio.h>
#include "qos_init_g2n_v10.h"
#include "../qos_common.h"
#include "../qos_reg.h"
#define RCAR_QOS_VERSION "rev.0.09"
#define REF_ARS_ARBSTOPCYCLE_G2N (((SL_INIT_SSLOTCLK_G2N) - 5U) << 16U)
#define QOSWT_TIME_BANK0 20000000U /* unit:ns */
#define QOSWT_WTEN_ENABLE 0x1U
#define OSWT_WTREF_SLOT0_EN_REQ1_SLOT 3U
#define OSWT_WTREF_SLOT0_EN_REQ2_SLOT 9U
#define QOSWT_WTREF_SLOT0_EN ((0x1U << OSWT_WTREF_SLOT0_EN_REQ1_SLOT) | \
(0x1U << OSWT_WTREF_SLOT0_EN_REQ2_SLOT))
#define QOSWT_WTREF_SLOT1_EN QOSWT_WTREF_SLOT0_EN
#define QOSWT_WTSET0_REQ_SSLOT0 5U
#define WT_BASE_SUB_SLOT_NUM0 12U
#define QOSWT_WTSET0_PERIOD0_G2N ((QOSWT_TIME_BANK0 / QOSWT_WTSET0_CYCLE_G2N) - 1U)
#define QOSWT_WTSET0_SSLOT0 (QOSWT_WTSET0_REQ_SSLOT0 - 1U)
#define QOSWT_WTSET0_SLOTSLOT0 (WT_BASE_SUB_SLOT_NUM0 - 1U)
#define QOSWT_WTSET1_PERIOD1_G2N QOSWT_WTSET0_PERIOD0_G2N
#define QOSWT_WTSET1_SSLOT1 QOSWT_WTSET0_SSLOT0
#define QOSWT_WTSET1_SLOTSLOT1 QOSWT_WTSET0_SLOTSLOT0
#if RCAR_QOS_TYPE == RCAR_QOS_TYPE_DEFAULT
#if RCAR_REF_INT == RCAR_REF_DEFAULT
#include "qos_init_g2n_v10_mstat195.h"
#else
#include "qos_init_g2n_v10_mstat390.h"
#endif
#if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
#if RCAR_REF_INT == RCAR_REF_DEFAULT
#include "qos_init_g2n_v10_qoswt195.h"
#else
#include "qos_init_g2n_v10_qoswt390.h"
#endif
#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
#endif
static const struct rcar_gen3_dbsc_qos_settings g2n_v10_qos[] = {
/* BUFCAM settings */
{ DBSC_DBCAM0CNF1, 0x00043218U },
{ DBSC_DBCAM0CNF2, 0x000000F4U },
{ DBSC_DBSCHCNT0, 0x000F0037U },
{ DBSC_DBSCHSZ0, 0x00000001U },
{ DBSC_DBSCHRW0, 0x22421111U },
/* DDR3 */
{ DBSC_SCFCTST2, 0x012F1123U },
/* QoS Settings */
{ DBSC_DBSCHQOS00, 0x00000F00U },
{ DBSC_DBSCHQOS01, 0x00000B00U },
{ DBSC_DBSCHQOS02, 0x00000000U },
{ DBSC_DBSCHQOS03, 0x00000000U },
{ DBSC_DBSCHQOS40, 0x00000300U },
{ DBSC_DBSCHQOS41, 0x000002F0U },
{ DBSC_DBSCHQOS42, 0x00000200U },
{ DBSC_DBSCHQOS43, 0x00000100U },
{ DBSC_DBSCHQOS90, 0x00000100U },
{ DBSC_DBSCHQOS91, 0x000000F0U },
{ DBSC_DBSCHQOS92, 0x000000A0U },
{ DBSC_DBSCHQOS93, 0x00000040U },
{ DBSC_DBSCHQOS130, 0x00000100U },
{ DBSC_DBSCHQOS131, 0x000000F0U },
{ DBSC_DBSCHQOS132, 0x000000A0U },
{ DBSC_DBSCHQOS133, 0x00000040U },
{ DBSC_DBSCHQOS140, 0x000000C0U },
{ DBSC_DBSCHQOS141, 0x000000B0U },
{ DBSC_DBSCHQOS142, 0x00000080U },
{ DBSC_DBSCHQOS143, 0x00000040U },
{ DBSC_DBSCHQOS150, 0x00000040U },
{ DBSC_DBSCHQOS151, 0x00000030U },
{ DBSC_DBSCHQOS152, 0x00000020U },
{ DBSC_DBSCHQOS153, 0x00000010U },
};
void qos_init_g2n_v10(void)
{
rzg_qos_dbsc_setting(g2n_v10_qos, ARRAY_SIZE(g2n_v10_qos), true);
/* DRAM Split Address mapping */
#if RCAR_DRAM_SPLIT == RCAR_DRAM_SPLIT_4CH
#if RCAR_LSI == RZ_G2N
#error "Don't set DRAM Split 4ch(G2N)"
#else
ERROR("DRAM Split 4ch not supported.(G2N)");
panic();
#endif
#elif (RCAR_DRAM_SPLIT == RCAR_DRAM_SPLIT_2CH)
#if RCAR_LSI == RZ_G2N
#error "Don't set DRAM Split 2ch(G2N)"
#else
ERROR("DRAM Split 2ch not supported.(G2N)");
panic();
#endif
#else
NOTICE("BL2: DRAM Split is OFF\n");
#endif
#if !(RCAR_QOS_TYPE == RCAR_QOS_NONE)
#if RCAR_QOS_TYPE == RCAR_QOS_TYPE_DEFAULT
NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION);
#endif
#if RCAR_REF_INT == RCAR_REF_DEFAULT
NOTICE("BL2: DRAM refresh interval 1.95 usec\n");
#else
NOTICE("BL2: DRAM refresh interval 3.9 usec\n");
#endif
#if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
NOTICE("BL2: Periodic Write DQ Training\n");
#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
mmio_write_32(QOSCTRL_RAS, 0x00000028U);
mmio_write_64(QOSCTRL_DANN, 0x0402000002020201UL);
mmio_write_32(QOSCTRL_DANT, 0x00100804U);
mmio_write_32(QOSCTRL_FSS, 0x0000000AU);
mmio_write_32(QOSCTRL_INSFC, 0x06330001U);
mmio_write_32(QOSCTRL_EARLYR, 0x00000001U);
mmio_write_32(QOSCTRL_RACNT0, 0x00010003U);
mmio_write_32(QOSCTRL_SL_INIT, SL_INIT_REFFSSLOT |
SL_INIT_SLOTSSLOT | SL_INIT_SSLOTCLK_G2N);
mmio_write_32(QOSCTRL_REF_ARS, REF_ARS_ARBSTOPCYCLE_G2N);
uint32_t i;
for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
mmio_write_64(QOSBW_FIX_QOS_BANK0 + i * 8U, mstat_fix[i]);
mmio_write_64(QOSBW_FIX_QOS_BANK1 + i * 8U, mstat_fix[i]);
}
for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
mmio_write_64(QOSBW_BE_QOS_BANK0 + i * 8U, mstat_be[i]);
mmio_write_64(QOSBW_BE_QOS_BANK1 + i * 8U, mstat_be[i]);
}
#if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
mmio_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8U, qoswt_fix[i]);
mmio_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8U, qoswt_fix[i]);
}
for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
mmio_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8U, qoswt_be[i]);
mmio_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8U, qoswt_be[i]);
}
#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
/* RT bus Leaf setting */
mmio_write_32(RT_ACT0, 0x00000000U);
mmio_write_32(RT_ACT1, 0x00000000U);
/* CCI bus Leaf setting */
mmio_write_32(CPU_ACT0, 0x00000003U);
mmio_write_32(CPU_ACT1, 0x00000003U);
mmio_write_32(QOSCTRL_RAEN, 0x00000001U);
#if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
/* re-write training setting */
mmio_write_32(QOSWT_WTREF, ((QOSWT_WTREF_SLOT1_EN << 16) | QOSWT_WTREF_SLOT0_EN));
mmio_write_32(QOSWT_WTSET0, ((QOSWT_WTSET0_PERIOD0_G2N << 16) |
(QOSWT_WTSET0_SSLOT0 << 8) | QOSWT_WTSET0_SLOTSLOT0));
mmio_write_32(QOSWT_WTSET1, ((QOSWT_WTSET1_PERIOD1_G2N << 16) |
(QOSWT_WTSET1_SSLOT1 << 8) | QOSWT_WTSET1_SLOTSLOT1));
mmio_write_32(QOSWT_WTEN, QOSWT_WTEN_ENABLE);
#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
mmio_write_32(QOSCTRL_STATQC, 0x00000001U);
#else
NOTICE("BL2: QoS is None\n");
mmio_write_32(QOSCTRL_RAEN, 0x00000001U);
#endif /* !(RCAR_QOS_TYPE == RCAR_QOS_NONE) */
}

12
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@ -0,0 +1,12 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef QOS_INIT_G2N_V10_H
#define QOS_INIT_G2N_V10_H
void qos_init_g2n_v10(void);
#endif /* QOS_INIT_G2N_V10_H */

245
drivers/renesas/rzg/qos/G2N/qos_init_g2n_v10_mstat195.h Normal file
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@ -0,0 +1,245 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef QOS_INIT_G2N_MSTAT195_H
#define QOS_INIT_G2N_MSTAT195_H
static uint64_t mstat_fix[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0000000000000000UL,
/* 0x0030, */ 0x001004320000FFFFUL,
/* 0x0038, */ 0x001004320000FFFFUL,
/* 0x0040, */ 0x00140C5D0000FFFFUL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x001404040000FFFFUL,
/* 0x0058, */ 0x00140C940000FFFFUL,
/* 0x0060, */ 0x00140C940000FFFFUL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x001404040000FFFFUL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x0014041F0000FFFFUL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x000C041D0000FFFFUL,
/* 0x00a8, */ 0x000C04090000FFFFUL,
/* 0x00b0, */ 0x000C040B0000FFFFUL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x000C041D0000FFFFUL,
/* 0x00c8, */ 0x000C04090000FFFFUL,
/* 0x00d0, */ 0x000C040B0000FFFFUL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x000C084F0000FFFFUL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x000C21E60000FFFFUL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x00100CA50000FFFFUL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x001010C90000FFFFUL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x00100CA50000FFFFUL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x001008530000FFFFUL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x00101D9D0000FFFFUL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x00100CA50000FFFFUL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x000C04010000FFFFUL,
/* 0x01c8, */ 0x000C04010000FFFFUL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0000000000000000UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0000000000000000UL,
/* 0x0218, */ 0x0000000000000000UL,
/* 0x0220, */ 0x0000000000000000UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0000000000000000UL,
/* 0x0238, */ 0x0000000000000000UL,
/* 0x0240, */ 0x0000000000000000UL,
/* 0x0248, */ 0x0000000000000000UL,
/* 0x0250, */ 0x0000000000000000UL,
/* 0x0258, */ 0x0000000000000000UL,
/* 0x0260, */ 0x0000000000000000UL,
/* 0x0268, */ 0x001408020000FFFFUL,
/* 0x0270, */ 0x001404010000FFFFUL,
/* 0x0278, */ 0x0000000000000000UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x001408020000FFFFUL,
/* 0x0298, */ 0x001404010000FFFFUL,
/* 0x02a0, */ 0x000C04050000FFFFUL,
/* 0x02a8, */ 0x000C04050000FFFFUL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x000C04050000FFFFUL,
/* 0x02d8, */ 0x000C04050000FFFFUL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x0000000000000000UL,
/* 0x02f8, */ 0x0000000000000000UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0000000000000000UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0000000000000000UL,
/* 0x0370, */ 0x0000000000000000UL,
/* 0x0378, */ 0x0000000000000000UL,
/* 0x0380, */ 0x000C04050000FFFFUL,
/* 0x0388, */ 0x000C04050000FFFFUL,
/* 0x0390, */ 0x0000000000000000UL,
};
static uint64_t mstat_be[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x001200100BD03401UL,
/* 0x0030, */ 0x0000000000000000UL,
/* 0x0038, */ 0x0000000000000000UL,
/* 0x0040, */ 0x0000000000000000UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x0000000000000000UL,
/* 0x0060, */ 0x0000000000000000UL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x0000000000000000UL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x0000000000000000UL,
/* 0x00a8, */ 0x0000000000000000UL,
/* 0x00b0, */ 0x0000000000000000UL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x0000000000000000UL,
/* 0x00c8, */ 0x0000000000000000UL,
/* 0x00d0, */ 0x0000000000000000UL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x0000000000000000UL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x0000000000000000UL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0000000000000000UL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0000000000000000UL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0000000000000000UL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0000000000000000UL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x0000000000000000UL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0000000000000000UL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x002106000BDFFC01UL,
/* 0x01c8, */ 0x002106000BDFFC01UL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0000000000000000UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0000000000000000UL,
/* 0x0218, */ 0x001101000BDF2401UL,
/* 0x0220, */ 0x001101000BDF2401UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x001101000BDF2401UL,
/* 0x0238, */ 0x001101000BDF2401UL,
/* 0x0240, */ 0x001201000BDF2401UL,
/* 0x0248, */ 0x001101000BDF2401UL,
/* 0x0250, */ 0x001201000BDF2401UL,
/* 0x0258, */ 0x001101000BDF2401UL,
/* 0x0260, */ 0x0000000000000000UL,
/* 0x0268, */ 0x0000000000000000UL,
/* 0x0270, */ 0x0000000000000000UL,
/* 0x0278, */ 0x0000000000000000UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x0000000000000000UL,
/* 0x0298, */ 0x0000000000000000UL,
/* 0x02a0, */ 0x0000000000000000UL,
/* 0x02a8, */ 0x0000000000000000UL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x0000000000000000UL,
/* 0x02d8, */ 0x0000000000000000UL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x001106000BDFFC01UL,
/* 0x02f8, */ 0x001106000BDFFC01UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x001200100BD03401UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x001206000BDFFC01UL,
/* 0x0360, */ 0x001206000BDFFC01UL,
/* 0x0368, */ 0x001200100BD03401UL,
/* 0x0370, */ 0x0000000000000000UL,
/* 0x0378, */ 0x0000000000000000UL,
/* 0x0380, */ 0x0000000000000000UL,
/* 0x0388, */ 0x0000000000000000UL,
/* 0x0390, */ 0x001200100BD03401UL,
};
#endif /* QOS_INIT_G2N_MSTAT195_H */

245
drivers/renesas/rzg/qos/G2N/qos_init_g2n_v10_mstat390.h Normal file
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@ -0,0 +1,245 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef QOS_INIT_G2N_MSTAT390_H
#define QOS_INIT_G2N_MSTAT390_H
static uint64_t mstat_fix[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0000000000000000UL,
/* 0x0030, */ 0x001008630000FFFFUL,
/* 0x0038, */ 0x001008630000FFFFUL,
/* 0x0040, */ 0x001418BA0000FFFFUL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x001404070000FFFFUL,
/* 0x0058, */ 0x001415270000FFFFUL,
/* 0x0060, */ 0x001415270000FFFFUL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x001404070000FFFFUL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x0014083E0000FFFFUL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x000C08390000FFFFUL,
/* 0x00a8, */ 0x000C04110000FFFFUL,
/* 0x00b0, */ 0x000C04150000FFFFUL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x000C08390000FFFFUL,
/* 0x00c8, */ 0x000C04110000FFFFUL,
/* 0x00d0, */ 0x000C04150000FFFFUL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x001045080000FFFFUL,
/* 0x00f8, */ 0x000C0C9E0000FFFFUL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x001015080000FFFFUL,
/* 0x0118, */ 0x000C43CB0000FFFFUL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0010194A0000FFFFUL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x00101D910000FFFFUL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0010194A0000FFFFUL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x00100CA50000FFFFUL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x001037390000FFFFUL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0010194A0000FFFFUL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x000C04010000FFFFUL,
/* 0x01c8, */ 0x000C04010000FFFFUL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x000C04020000FFFFUL,
/* 0x01f0, */ 0x000C04090000FFFFUL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x000C04090000FFFFUL,
/* 0x0210, */ 0x000C04090000FFFFUL,
/* 0x0218, */ 0x0000000000000000UL,
/* 0x0220, */ 0x0000000000000000UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0000000000000000UL,
/* 0x0238, */ 0x0000000000000000UL,
/* 0x0240, */ 0x0000000000000000UL,
/* 0x0248, */ 0x0000000000000000UL,
/* 0x0250, */ 0x0000000000000000UL,
/* 0x0258, */ 0x0000000000000000UL,
/* 0x0260, */ 0x000C0C2A0000FFFFUL,
/* 0x0268, */ 0x001410040000FFFFUL,
/* 0x0270, */ 0x001404020000FFFFUL,
/* 0x0278, */ 0x000C08110000FFFFUL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x001410040000FFFFUL,
/* 0x0298, */ 0x001404020000FFFFUL,
/* 0x02a0, */ 0x000C04090000FFFFUL,
/* 0x02a8, */ 0x000C04090000FFFFUL,
/* 0x02b0, */ 0x00140C090000FFFFUL,
/* 0x02b8, */ 0x000C04020000FFFFUL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x000C04090000FFFFUL,
/* 0x02d8, */ 0x000C04090000FFFFUL,
/* 0x02e0, */ 0x00140C090000FFFFUL,
/* 0x02e8, */ 0x000C04020000FFFFUL,
/* 0x02f0, */ 0x0000000000000000UL,
/* 0x02f8, */ 0x0000000000000000UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0000000000000000UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0000000000000000UL,
/* 0x0370, */ 0x000C04020000FFFFUL,
/* 0x0378, */ 0x000C04020000FFFFUL,
/* 0x0380, */ 0x000C04090000FFFFUL,
/* 0x0388, */ 0x000C04090000FFFFUL,
/* 0x0390, */ 0x0000000000000000UL,
};
static uint64_t mstat_be[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0012001005E03401UL,
/* 0x0030, */ 0x0000000000000000UL,
/* 0x0038, */ 0x0000000000000000UL,
/* 0x0040, */ 0x0000000000000000UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x0000000000000000UL,
/* 0x0060, */ 0x0000000000000000UL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x0000000000000000UL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x0000000000000000UL,
/* 0x00a8, */ 0x0000000000000000UL,
/* 0x00b0, */ 0x0000000000000000UL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x0000000000000000UL,
/* 0x00c8, */ 0x0000000000000000UL,
/* 0x00d0, */ 0x0000000000000000UL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x0000000000000000UL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x0000000000000000UL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0000000000000000UL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0000000000000000UL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0000000000000000UL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0000000000000000UL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x0000000000000000UL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0000000000000000UL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x0021060005EFFC01UL,
/* 0x01c8, */ 0x0021060005EFFC01UL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0021010005E79401UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0021010005E79401UL,
/* 0x0218, */ 0x0011010005E79401UL,
/* 0x0220, */ 0x0011010005E79401UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0011010005E79401UL,
/* 0x0238, */ 0x0011010005E79401UL,
/* 0x0240, */ 0x0012010005E79401UL,
/* 0x0248, */ 0x0011010005E79401UL,
/* 0x0250, */ 0x0012010005E79401UL,
/* 0x0258, */ 0x0011010005E79401UL,
/* 0x0260, */ 0x0000000000000000UL,
/* 0x0268, */ 0x0000000000000000UL,
/* 0x0270, */ 0x0000000000000000UL,
/* 0x0278, */ 0x0000000000000000UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x0000000000000000UL,
/* 0x0298, */ 0x0000000000000000UL,
/* 0x02a0, */ 0x0000000000000000UL,
/* 0x02a8, */ 0x0000000000000000UL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x0000000000000000UL,
/* 0x02d8, */ 0x0000000000000000UL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x0011060005EFFC01UL,
/* 0x02f8, */ 0x0011060005EFFC01UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0012001005E03401UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0012060005EFFC01UL,
/* 0x0360, */ 0x0012060005EFFC01UL,
/* 0x0368, */ 0x0012001005E03401UL,
/* 0x0370, */ 0x0000000000000000UL,
/* 0x0378, */ 0x0000000000000000UL,
/* 0x0380, */ 0x0000000000000000UL,
/* 0x0388, */ 0x0000000000000000UL,
/* 0x0390, */ 0x0012001005E03401UL,
};
#endif /* QOS_INIT_G2N_MSTAT390_H */

245
drivers/renesas/rzg/qos/G2N/qos_init_g2n_v10_qoswt195.h Normal file
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@ -0,0 +1,245 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef QOS_INIT_G2N_QOSWT195_H
#define QOS_INIT_G2N_QOSWT195_H
static uint64_t qoswt_fix[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0000000000000000UL,
/* 0x0030, */ 0x001004320000C010UL,
/* 0x0038, */ 0x001004320000C010UL,
/* 0x0040, */ 0x00140C5D0000FFF0UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x00140C940000C010UL,
/* 0x0060, */ 0x00140C940000C010UL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x0014041F0000FFF0UL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x0000000000000000UL,
/* 0x00a8, */ 0x0000000000000000UL,
/* 0x00b0, */ 0x0000000000000000UL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x0000000000000000UL,
/* 0x00c8, */ 0x0000000000000000UL,
/* 0x00d0, */ 0x0000000000000000UL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x0000000000000000UL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x0000000000000000UL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0000000000000000UL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0000000000000000UL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0000000000000000UL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0000000000000000UL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x0000000000000000UL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0000000000000000UL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x0000000000000000UL,
/* 0x01c8, */ 0x0000000000000000UL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0000000000000000UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0000000000000000UL,
/* 0x0218, */ 0x0000000000000000UL,
/* 0x0220, */ 0x0000000000000000UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0000000000000000UL,
/* 0x0238, */ 0x0000000000000000UL,
/* 0x0240, */ 0x0000000000000000UL,
/* 0x0248, */ 0x0000000000000000UL,
/* 0x0250, */ 0x0000000000000000UL,
/* 0x0258, */ 0x0000000000000000UL,
/* 0x0260, */ 0x000C08150000FFF0UL,
/* 0x0268, */ 0x001408020000FFF0UL,
/* 0x0270, */ 0x001404010000FFF0UL,
/* 0x0278, */ 0x000C04090000FFF0UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x001408020000FFF0UL,
/* 0x0298, */ 0x001404010000FFF0UL,
/* 0x02a0, */ 0x0000000000000000UL,
/* 0x02a8, */ 0x0000000000000000UL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x0000000000000000UL,
/* 0x02d8, */ 0x0000000000000000UL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x0000000000000000UL,
/* 0x02f8, */ 0x0000000000000000UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0000000000000000UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0000000000000000UL,
/* 0x0370, */ 0x0000000000000000UL,
/* 0x0378, */ 0x0000000000000000UL,
/* 0x0380, */ 0x0000000000000000UL,
/* 0x0388, */ 0x0000000000000000UL,
/* 0x0390, */ 0x0000000000000000UL,
};
static uint64_t qoswt_be[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0000000000000000UL,
/* 0x0030, */ 0x0000000000000000UL,
/* 0x0038, */ 0x0000000000000000UL,
/* 0x0040, */ 0x0000000000000000UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x0000000000000000UL,
/* 0x0060, */ 0x0000000000000000UL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x0000000000000000UL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x0000000000000000UL,
/* 0x00a8, */ 0x0000000000000000UL,
/* 0x00b0, */ 0x0000000000000000UL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x0000000000000000UL,
/* 0x00c8, */ 0x0000000000000000UL,
/* 0x00d0, */ 0x0000000000000000UL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x0000000000000000UL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x0000000000000000UL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0000000000000000UL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0000000000000000UL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0000000000000000UL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0000000000000000UL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x0000000000000000UL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0000000000000000UL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x0000000000000000UL,
/* 0x01c8, */ 0x0000000000000000UL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0000000000000000UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0000000000000000UL,
/* 0x0218, */ 0x0000000000000000UL,
/* 0x0220, */ 0x0000000000000000UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0000000000000000UL,
/* 0x0238, */ 0x0000000000000000UL,
/* 0x0240, */ 0x0000000000000000UL,
/* 0x0248, */ 0x0000000000000000UL,
/* 0x0250, */ 0x0000000000000000UL,
/* 0x0258, */ 0x0000000000000000UL,
/* 0x0260, */ 0x0000000000000000UL,
/* 0x0268, */ 0x0000000000000000UL,
/* 0x0270, */ 0x0000000000000000UL,
/* 0x0278, */ 0x0000000000000000UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x0000000000000000UL,
/* 0x0298, */ 0x0000000000000000UL,
/* 0x02a0, */ 0x0000000000000000UL,
/* 0x02a8, */ 0x0000000000000000UL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x0000000000000000UL,
/* 0x02d8, */ 0x0000000000000000UL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x0000000000000000UL,
/* 0x02f8, */ 0x0000000000000000UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0000000000000000UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0000000000000000UL,
/* 0x0370, */ 0x0000000000000000UL,
/* 0x0378, */ 0x0000000000000000UL,
/* 0x0380, */ 0x0000000000000000UL,
/* 0x0388, */ 0x0000000000000000UL,
/* 0x0390, */ 0x0000000000000000UL,
};
#endif /* QOS_INIT_G2N_QOSWT195_H */

245
drivers/renesas/rzg/qos/G2N/qos_init_g2n_v10_qoswt390.h Normal file
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@ -0,0 +1,245 @@
/*
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef QOS_INIT_G2N_QOSWT390_H
#define QOS_INIT_G2N_QOSWT390_H
static uint64_t qoswt_fix[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0000000000000000UL,
/* 0x0030, */ 0x001008630000C010UL,
/* 0x0038, */ 0x001008630000C010UL,
/* 0x0040, */ 0x001418BA0000FFF0UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x001415270000C010UL,
/* 0x0060, */ 0x001415270000C010UL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x0014083E0000FFF0UL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x0000000000000000UL,
/* 0x00a8, */ 0x0000000000000000UL,
/* 0x00b0, */ 0x0000000000000000UL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x0000000000000000UL,
/* 0x00c8, */ 0x0000000000000000UL,
/* 0x00d0, */ 0x0000000000000000UL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x0000000000000000UL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x0000000000000000UL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0000000000000000UL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0000000000000000UL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0000000000000000UL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0000000000000000UL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x0000000000000000UL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0000000000000000UL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x0000000000000000UL,
/* 0x01c8, */ 0x0000000000000000UL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0000000000000000UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0000000000000000UL,
/* 0x0218, */ 0x0000000000000000UL,
/* 0x0220, */ 0x0000000000000000UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0000000000000000UL,
/* 0x0238, */ 0x0000000000000000UL,
/* 0x0240, */ 0x0000000000000000UL,
/* 0x0248, */ 0x0000000000000000UL,
/* 0x0250, */ 0x0000000000000000UL,
/* 0x0258, */ 0x0000000000000000UL,
/* 0x0260, */ 0x000C0C2A0000FFF0UL,
/* 0x0268, */ 0x001410040000FFF0UL,
/* 0x0270, */ 0x001404020000FFF0UL,
/* 0x0278, */ 0x000C08110000FFF0UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x001410040000FFF0UL,
/* 0x0298, */ 0x001404020000FFF0UL,
/* 0x02a0, */ 0x0000000000000000UL,
/* 0x02a8, */ 0x0000000000000000UL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x0000000000000000UL,
/* 0x02d8, */ 0x0000000000000000UL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x0000000000000000UL,
/* 0x02f8, */ 0x0000000000000000UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0000000000000000UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0000000000000000UL,
/* 0x0370, */ 0x0000000000000000UL,
/* 0x0378, */ 0x0000000000000000UL,
/* 0x0380, */ 0x0000000000000000UL,
/* 0x0388, */ 0x0000000000000000UL,
/* 0x0390, */ 0x0000000000000000UL,
};
static uint64_t qoswt_be[] = {
/* 0x0000, */ 0x0000000000000000UL,
/* 0x0008, */ 0x0000000000000000UL,
/* 0x0010, */ 0x0000000000000000UL,
/* 0x0018, */ 0x0000000000000000UL,
/* 0x0020, */ 0x0000000000000000UL,
/* 0x0028, */ 0x0000000000000000UL,
/* 0x0030, */ 0x0000000000000000UL,
/* 0x0038, */ 0x0000000000000000UL,
/* 0x0040, */ 0x0000000000000000UL,
/* 0x0048, */ 0x0000000000000000UL,
/* 0x0050, */ 0x0000000000000000UL,
/* 0x0058, */ 0x0000000000000000UL,
/* 0x0060, */ 0x0000000000000000UL,
/* 0x0068, */ 0x0000000000000000UL,
/* 0x0070, */ 0x0000000000000000UL,
/* 0x0078, */ 0x0000000000000000UL,
/* 0x0080, */ 0x0000000000000000UL,
/* 0x0088, */ 0x0000000000000000UL,
/* 0x0090, */ 0x0000000000000000UL,
/* 0x0098, */ 0x0000000000000000UL,
/* 0x00a0, */ 0x0000000000000000UL,
/* 0x00a8, */ 0x0000000000000000UL,
/* 0x00b0, */ 0x0000000000000000UL,
/* 0x00b8, */ 0x0000000000000000UL,
/* 0x00c0, */ 0x0000000000000000UL,
/* 0x00c8, */ 0x0000000000000000UL,
/* 0x00d0, */ 0x0000000000000000UL,
/* 0x00d8, */ 0x0000000000000000UL,
/* 0x00e0, */ 0x0000000000000000UL,
/* 0x00e8, */ 0x0000000000000000UL,
/* 0x00f0, */ 0x0000000000000000UL,
/* 0x00f8, */ 0x0000000000000000UL,
/* 0x0100, */ 0x0000000000000000UL,
/* 0x0108, */ 0x0000000000000000UL,
/* 0x0110, */ 0x0000000000000000UL,
/* 0x0118, */ 0x0000000000000000UL,
/* 0x0120, */ 0x0000000000000000UL,
/* 0x0128, */ 0x0000000000000000UL,
/* 0x0130, */ 0x0000000000000000UL,
/* 0x0138, */ 0x0000000000000000UL,
/* 0x0140, */ 0x0000000000000000UL,
/* 0x0148, */ 0x0000000000000000UL,
/* 0x0150, */ 0x0000000000000000UL,
/* 0x0158, */ 0x0000000000000000UL,
/* 0x0160, */ 0x0000000000000000UL,
/* 0x0168, */ 0x0000000000000000UL,
/* 0x0170, */ 0x0000000000000000UL,
/* 0x0178, */ 0x0000000000000000UL,
/* 0x0180, */ 0x0000000000000000UL,
/* 0x0188, */ 0x0000000000000000UL,
/* 0x0190, */ 0x0000000000000000UL,
/* 0x0198, */ 0x0000000000000000UL,
/* 0x01a0, */ 0x0000000000000000UL,
/* 0x01a8, */ 0x0000000000000000UL,
/* 0x01b0, */ 0x0000000000000000UL,
/* 0x01b8, */ 0x0000000000000000UL,
/* 0x01c0, */ 0x0000000000000000UL,
/* 0x01c8, */ 0x0000000000000000UL,
/* 0x01d0, */ 0x0000000000000000UL,
/* 0x01d8, */ 0x0000000000000000UL,
/* 0x01e0, */ 0x0000000000000000UL,
/* 0x01e8, */ 0x0000000000000000UL,
/* 0x01f0, */ 0x0000000000000000UL,
/* 0x01f8, */ 0x0000000000000000UL,
/* 0x0200, */ 0x0000000000000000UL,
/* 0x0208, */ 0x0000000000000000UL,
/* 0x0210, */ 0x0000000000000000UL,
/* 0x0218, */ 0x0000000000000000UL,
/* 0x0220, */ 0x0000000000000000UL,
/* 0x0228, */ 0x0000000000000000UL,
/* 0x0230, */ 0x0000000000000000UL,
/* 0x0238, */ 0x0000000000000000UL,
/* 0x0240, */ 0x0000000000000000UL,
/* 0x0248, */ 0x0000000000000000UL,
/* 0x0250, */ 0x0000000000000000UL,
/* 0x0258, */ 0x0000000000000000UL,
/* 0x0260, */ 0x0000000000000000UL,
/* 0x0268, */ 0x0000000000000000UL,
/* 0x0270, */ 0x0000000000000000UL,
/* 0x0278, */ 0x0000000000000000UL,
/* 0x0280, */ 0x0000000000000000UL,
/* 0x0288, */ 0x0000000000000000UL,
/* 0x0290, */ 0x0000000000000000UL,
/* 0x0298, */ 0x0000000000000000UL,
/* 0x02a0, */ 0x0000000000000000UL,
/* 0x02a8, */ 0x0000000000000000UL,
/* 0x02b0, */ 0x0000000000000000UL,
/* 0x02b8, */ 0x0000000000000000UL,
/* 0x02c0, */ 0x0000000000000000UL,
/* 0x02c8, */ 0x0000000000000000UL,
/* 0x02d0, */ 0x0000000000000000UL,
/* 0x02d8, */ 0x0000000000000000UL,
/* 0x02e0, */ 0x0000000000000000UL,
/* 0x02e8, */ 0x0000000000000000UL,
/* 0x02f0, */ 0x0000000000000000UL,
/* 0x02f8, */ 0x0000000000000000UL,
/* 0x0300, */ 0x0000000000000000UL,
/* 0x0308, */ 0x0000000000000000UL,
/* 0x0310, */ 0x0000000000000000UL,
/* 0x0318, */ 0x0000000000000000UL,
/* 0x0320, */ 0x0000000000000000UL,
/* 0x0328, */ 0x0000000000000000UL,
/* 0x0330, */ 0x0000000000000000UL,
/* 0x0338, */ 0x0000000000000000UL,
/* 0x0340, */ 0x0000000000000000UL,
/* 0x0348, */ 0x0000000000000000UL,
/* 0x0350, */ 0x0000000000000000UL,
/* 0x0358, */ 0x0000000000000000UL,
/* 0x0360, */ 0x0000000000000000UL,
/* 0x0368, */ 0x0000000000000000UL,
/* 0x0370, */ 0x0000000000000000UL,
/* 0x0378, */ 0x0000000000000000UL,
/* 0x0380, */ 0x0000000000000000UL,
/* 0x0388, */ 0x0000000000000000UL,
/* 0x0390, */ 0x0000000000000000UL,
};
#endif /* QOS_INIT_G2N_QOSWT390_H */

28
drivers/renesas/rzg/qos/qos.mk
View File

@ -1,19 +1,31 @@
#
# Copyright (c) 2020, Renesas Electronics Corporation. All rights reserved.
# Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
ifeq (${RCAR_LSI},${RCAR_AUTO})
BL2_SOURCES += drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10.c
BL2_SOURCES += drivers/renesas/rzg/qos/G2H/qos_init_g2h_v30.c
BL2_SOURCES += drivers/renesas/rzg/qos/G2M/qos_init_g2m_v10.c
BL2_SOURCES += drivers/renesas/rzg/qos/G2M/qos_init_g2m_v11.c
BL2_SOURCES += drivers/renesas/rzg/qos/G2M/qos_init_g2m_v30.c
BL2_SOURCES += drivers/renesas/rzg/qos/G2N/qos_init_g2n_v10.c
else ifeq (${RCAR_LSI_CUT_COMPAT},1)
ifeq (${RCAR_LSI},${RZ_G2M})
BL2_SOURCES += drivers/renesas/rzg/qos/G2M/qos_init_g2m_v10.c
BL2_SOURCES += drivers/renesas/rzg/qos/G2M/qos_init_g2m_v11.c
BL2_SOURCES += drivers/renesas/rzg/qos/G2M/qos_init_g2m_v30.c
endif
ifeq (${RCAR_LSI},${RZ_G2H})
BL2_SOURCES += drivers/renesas/rzg/qos/G2H/qos_init_g2h_v30.c
endif
ifeq (${RCAR_LSI},${RZ_G2N})
BL2_SOURCES += drivers/renesas/rzg/qos/G2N/qos_init_g2n_v10.c
endif
ifeq (${RCAR_LSI},${RZ_G2E})
BL2_SOURCES += drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10.c
endif
else
ifeq (${RCAR_LSI},${RZ_G2M})
ifeq (${LSI_CUT},10)
@ -29,6 +41,20 @@ else
BL2_SOURCES += drivers/renesas/rzg/qos/G2M/qos_init_g2m_v30.c
endif
endif
ifeq (${RCAR_LSI},${RZ_G2H})
BL2_SOURCES += drivers/renesas/rzg/qos/G2H/qos_init_g2h_v30.c
endif
ifeq (${RCAR_LSI},${RZ_G2N})
ifeq (${LSI_CUT},10)
BL2_SOURCES += drivers/renesas/rzg/qos/G2N/qos_init_g2n_v10.c
else
# LSI_CUT 10 or later
BL2_SOURCES += drivers/renesas/rzg/qos/G2N/qos_init_g2n_v10.c
endif
endif
ifeq (${RCAR_LSI},${RZ_G2E})
BL2_SOURCES += drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10.c
endif
endif
BL2_SOURCES += drivers/renesas/rzg/qos/qos_init.c

38
drivers/renesas/rzg/qos/qos_common.h
View File

@ -37,6 +37,44 @@
((SUB_SLOT_CYCLE_G2M_30 * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
#endif
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2N)
/* define used for G2N */
#if (RCAR_REF_INT == RCAR_REF_DEFAULT) /* REF 1.95usec */
#define SUB_SLOT_CYCLE_G2N 0x7EU /* 126 */
#else /* REF 3.9usec */
#define SUB_SLOT_CYCLE_G2N 0xFCU /* 252 */
#endif /* (RCAR_REF_INT == RCAR_REF_DEFAULT) */
#define SL_INIT_SSLOTCLK_G2N (SUB_SLOT_CYCLE_G2N - 1U)
#define QOSWT_WTSET0_CYCLE_G2N /* unit:ns */ \
((SUB_SLOT_CYCLE_G2N * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
#endif /* (RCAR_LSI == RZ_G2N) */
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2H)
/* define used for G2H */
#if (RCAR_REF_INT == RCAR_REF_DEFAULT) /* REF 1.95usec */
#define SUB_SLOT_CYCLE_G2H 0x7EU /* 126 */
#else /* REF 3.9usec */
#define SUB_SLOT_CYCLE_G2H 0xFCU /* 252 */
#endif /* (RCAR_REF_INT == RCAR_REF_DEFAULT) */
#define SL_INIT_SSLOTCLK_G2H (SUB_SLOT_CYCLE_G2H - 1U)
#define QOSWT_WTSET0_CYCLE_G2H /* unit:ns */ \
((SUB_SLOT_CYCLE_G2H * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
#endif
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2E)
/* define used for G2E */
#if (RCAR_REF_INT == RCAR_REF_DEFAULT) /* REF 3.9usec */
#define SUB_SLOT_CYCLE_G2E 0xAFU /* 175 */
#else /* REF 7.8usec */
#define SUB_SLOT_CYCLE_G2E 0x15EU /* 350 */
#endif /* (RCAR_REF_INT == RCAR_REF_DEFAULT) */
#define OPERATING_FREQ_G2E 266U /* MHz */
#define SL_INIT_SSLOTCLK_G2E (SUB_SLOT_CYCLE_G2E - 1U)
#endif
#define OPERATING_FREQ 400U /* MHz */
#define BASE_SUB_SLOT_NUM 0x6U
#define SUB_SLOT_CYCLE 0x7EU /* 126 */

94
drivers/renesas/rzg/qos/qos_init.c
View File

@ -10,23 +10,37 @@
#include <lib/mmio.h>
#if RCAR_LSI == RCAR_AUTO
#include "G2E/qos_init_g2e_v10.h"
#include "G2H/qos_init_g2h_v30.h"
#include "G2M/qos_init_g2m_v10.h"
#include "G2M/qos_init_g2m_v11.h"
#include "G2M/qos_init_g2m_v30.h"
#include "G2N/qos_init_g2n_v10.h"
#endif /* RCAR_LSI == RCAR_AUTO */
#if (RCAR_LSI == RZ_G2M)
#include "G2M/qos_init_g2m_v10.h"
#include "G2M/qos_init_g2m_v11.h"
#include "G2M/qos_init_g2m_v30.h"
#endif /* RCAR_LSI == RZ_G2M */
#if RCAR_LSI == RZ_G2H
#include "G2H/qos_init_g2h_v30.h"
#endif /* RCAR_LSI == RZ_G2H */
#if RCAR_LSI == RZ_G2N
#include "G2N/qos_init_g2n_v10.h"
#endif /* RCAR_LSI == RZ_G2N */
#if RCAR_LSI == RZ_G2E
#include "G2E/qos_init_g2e_v10.h"
#endif /* RCAR_LSI == RZ_G2E */
#include "qos_common.h"
#include "qos_init.h"
#include "qos_reg.h"
#include "rcar_def.h"
#if (RCAR_LSI != RZ_G2E)
#define DRAM_CH_CNT 0x04U
uint32_t qos_init_ddr_ch;
uint8_t qos_init_ddr_phyvalid;
#endif /* RCAR_LSI != RZ_G2E */
#define PRR_PRODUCT_ERR(reg) \
{ \
@ -45,15 +59,17 @@ uint8_t qos_init_ddr_phyvalid;
void rzg_qos_init(void)
{
uint32_t reg;
#if (RCAR_LSI != RZ_G2E)
uint32_t i;
qos_init_ddr_ch = 0U;
qos_init_ddr_phyvalid = rzg_get_boardcnf_phyvalid();
qos_init_ddr_phyvalid = get_boardcnf_phyvalid();
for (i = 0U; i < DRAM_CH_CNT; i++) {
if ((qos_init_ddr_phyvalid & (1U << i))) {
qos_init_ddr_ch++;
}
}
#endif /* RCAR_LSI != RZ_G2E */
reg = mmio_read_32(PRR);
#if (RCAR_LSI == RCAR_AUTO) || RCAR_LSI_CUT_COMPAT
@ -76,6 +92,42 @@ void rzg_qos_init(void)
PRR_PRODUCT_ERR(reg);
#endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2M) */
break;
case PRR_PRODUCT_H3:
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2H)
switch (reg & PRR_CUT_MASK) {
case PRR_PRODUCT_30:
default:
qos_init_g2h_v30();
break;
}
#else
PRR_PRODUCT_ERR(reg);
#endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2H) */
break;
case PRR_PRODUCT_M3N:
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2N)
switch (reg & PRR_CUT_MASK) {
case PRR_PRODUCT_10:
default:
qos_init_g2n_v10();
break;
}
#else
PRR_PRODUCT_ERR(reg);
#endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2N) */
break;
case PRR_PRODUCT_E3:
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2E)
switch (reg & PRR_CUT_MASK) {
case PRR_PRODUCT_10:
default:
qos_init_g2e_v10();
break;
}
#else
PRR_PRODUCT_ERR(reg);
#endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2E) */
break;
default:
PRR_PRODUCT_ERR(reg);
break;
@ -111,12 +163,31 @@ void rzg_qos_init(void)
}
qos_init_g2m_v30();
#endif /* RCAR_LSI_CUT == RCAR_CUT_10 */
#elif (RCAR_LSI == RZ_G2H)
/* G2H Cut 30 or later */
if ((reg & PRR_PRODUCT_MASK) != PRR_PRODUCT_H3) {
PRR_PRODUCT_ERR(reg);
}
qos_init_g2h_v30();
#elif (RCAR_LSI == RZ_G2N)
/* G2N Cut 10 or later */
if ((reg & (PRR_PRODUCT_MASK)) != PRR_PRODUCT_M3N) {
PRR_PRODUCT_ERR(reg);
}
qos_init_g2n_v10();
#elif RCAR_LSI == RZ_G2E
/* G2E Cut 10 or later */
if ((reg & (PRR_PRODUCT_MASK)) != PRR_PRODUCT_E3) {
PRR_PRODUCT_ERR(reg);
}
qos_init_g2e_v10();
#else /* (RCAR_LSI == RZ_G2M) */
#error "Don't have QoS initialize routine(Unknown chip)."
#endif /* (RCAR_LSI == RZ_G2M) */
#endif /* RCAR_LSI == RCAR_AUTO || RCAR_LSI_CUT_COMPAT */
}
#if (RCAR_LSI != RZ_G2E)
uint32_t get_refperiod(void)
{
uint32_t refperiod = QOSWT_WTSET0_CYCLE;
@ -140,6 +211,21 @@ uint32_t get_refperiod(void)
}
break;
#endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2M) */
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2H)
case PRR_PRODUCT_H3:
switch (reg & PRR_CUT_MASK) {
case PRR_PRODUCT_30:
default:
refperiod = REFPERIOD_CYCLE;
break;
}
break;
#endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2H) */
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2N)
case PRR_PRODUCT_M3N:
refperiod = REFPERIOD_CYCLE;
break;
#endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2N) */
default:
break;
}
@ -150,9 +236,15 @@ uint32_t get_refperiod(void)
/* G2M Cut 11|13|30 or later */
refperiod = REFPERIOD_CYCLE;
#endif /* RCAR_LSI_CUT == RCAR_CUT_10 */
#elif RCAR_LSI == RZ_G2N
refperiod = REFPERIOD_CYCLE;
#elif RCAR_LSI == RZ_G2H
/* G2H Cut 30 or later */
refperiod = REFPERIOD_CYCLE;
#endif /* RCAR_LSI == RCAR_AUTO || RCAR_LSI_CUT_COMPAT */
return refperiod;
}
#endif /* RCAR_LSI != RZ_G2E */
void rzg_qos_dbsc_setting(const struct rcar_gen3_dbsc_qos_settings *qos,
unsigned int qos_size, bool dbsc_wren)

4
drivers/renesas/rzg/qos/qos_init.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2020, Renesas Electronics Corporation. All rights reserved.
* Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -8,6 +8,6 @@
#define RZG_QOS_INIT_H
void rzg_qos_init(void);
uint8_t rzg_get_boardcnf_phyvalid(void);
uint8_t get_boardcnf_phyvalid(void);
#endif /* RZG_QOS_INIT_H */

30
plat/renesas/common/bl2_cpg_init.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
* Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -13,7 +13,8 @@
static void bl2_secure_cpg_init(void);
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N)
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_H3) || \
(RCAR_LSI == RCAR_H3N) || (RCAR_LSI == RZ_G2H)
static void bl2_realtime_cpg_init_h3(void);
static void bl2_system_cpg_init_h3(void);
#endif
@ -23,7 +24,7 @@ static void bl2_realtime_cpg_init_m3(void);
static void bl2_system_cpg_init_m3(void);
#endif
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_M3N)
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_M3N) || (RCAR_LSI == RZ_G2N)
static void bl2_realtime_cpg_init_m3n(void);
static void bl2_system_cpg_init_m3n(void);
#endif
@ -33,7 +34,7 @@ static void bl2_realtime_cpg_init_v3m(void);
static void bl2_system_cpg_init_v3m(void);
#endif
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_E3)
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_E3) || (RCAR_LSI == RZ_G2E)
static void bl2_realtime_cpg_init_e3(void);
static void bl2_system_cpg_init_e3(void);
#endif
@ -57,7 +58,7 @@ static void bl2_secure_cpg_init(void)
#if (RCAR_LSI == RCAR_D3)
reset_cr2 = 0x00000000U;
stop_cr2 = 0xFFFFFFFFU;
#elif (RCAR_LSI == RCAR_E3)
#elif (RCAR_LSI == RCAR_E3) || (RCAR_LSI == RZ_G2E)
reset_cr2 = 0x10000000U;
stop_cr2 = 0xEFFFFFFFU;
#else
@ -106,7 +107,8 @@ static void bl2_secure_cpg_init(void)
cpg_write(SCSRSTECR11, 0x00000000U);
}
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N)
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_H3) || \
(RCAR_LSI == RCAR_H3N) || (RCAR_LSI == RZ_G2H)
static void bl2_realtime_cpg_init_h3(void)
{
uint32_t cut = mmio_read_32(RCAR_PRR) & PRR_CUT_MASK;
@ -185,7 +187,7 @@ static void bl2_system_cpg_init_m3(void)
}
#endif
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_M3N)
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_M3N) || (RCAR_LSI == RZ_G2N)
static void bl2_realtime_cpg_init_m3n(void)
{
/* Realtime Module Stop Control Registers */
@ -253,7 +255,7 @@ static void bl2_system_cpg_init_v3m(void)
}
#endif
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_E3)
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_E3) || (RCAR_LSI == RZ_G2E)
static void bl2_realtime_cpg_init_e3(void)
{
/* Realtime Module Stop Control Registers */
@ -360,15 +362,15 @@ void bl2_cpg_init(void)
panic();
break;
}
#elif (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N)
#elif (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N) || (RCAR_LSI == RZ_G2H)
bl2_realtime_cpg_init_h3();
#elif (RCAR_LSI == RCAR_M3) || (RCAR_LSI == RZ_G2M)
bl2_realtime_cpg_init_m3();
#elif RCAR_LSI == RCAR_M3N
#elif RCAR_LSI == RCAR_M3N || (RCAR_LSI == RZ_G2N)
bl2_realtime_cpg_init_m3n();
#elif RCAR_LSI == RCAR_V3M
bl2_realtime_cpg_init_v3m();
#elif RCAR_LSI == RCAR_E3
#elif RCAR_LSI == RCAR_E3 || RCAR_LSI == RZ_G2E
bl2_realtime_cpg_init_e3();
#elif RCAR_LSI == RCAR_D3
bl2_realtime_cpg_init_d3();
@ -406,15 +408,15 @@ void bl2_system_cpg_init(void)
panic();
break;
}
#elif (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N)
#elif (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N) || (RCAR_LSI == RZ_G2H)
bl2_system_cpg_init_h3();
#elif (RCAR_LSI == RCAR_M3) || (RCAR_LSI == RZ_G2M)
bl2_system_cpg_init_m3();
#elif RCAR_LSI == RCAR_M3N
#elif RCAR_LSI == RCAR_M3N || (RCAR_LSI == RZ_G2N)
bl2_system_cpg_init_m3n();
#elif RCAR_LSI == RCAR_V3M
bl2_system_cpg_init_v3m();
#elif RCAR_LSI == RCAR_E3
#elif RCAR_LSI == RCAR_E3 || RCAR_LSI == RZ_G2E
bl2_system_cpg_init_e3();
#elif RCAR_LSI == RCAR_D3
bl2_system_cpg_init_d3();

6
plat/renesas/common/common.mk
View File

@ -34,6 +34,9 @@ RCAR_D3:=5
RCAR_V3M:=6
RCAR_AUTO:=99
RZ_G2M:=100
RZ_G2H:=101
RZ_G2N:=102
RZ_G2E:=103
$(eval $(call add_define,RCAR_H3))
$(eval $(call add_define,RCAR_M3))
$(eval $(call add_define,RCAR_M3N))
@ -43,6 +46,9 @@ $(eval $(call add_define,RCAR_D3))
$(eval $(call add_define,RCAR_V3M))
$(eval $(call add_define,RCAR_AUTO))
$(eval $(call add_define,RZ_G2M))
$(eval $(call add_define,RZ_G2H))
$(eval $(call add_define,RZ_G2N))
$(eval $(call add_define,RZ_G2E))
RCAR_CUT_10:=0
RCAR_CUT_11:=1

6
plat/renesas/rcar/platform.mk
View File

@ -1,5 +1,5 @@
#
# Copyright (c) 2018-2020, Renesas Electronics Corporation. All rights reserved.
# Copyright (c) 2018-2021, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -293,12 +293,12 @@ ifeq (${RCAR_SYSTEM_RESET_KEEPON_DDR},1)
endif
endif
include drivers/renesas/rcar/ddr/ddr.mk
include drivers/renesas/common/ddr/ddr.mk
include drivers/renesas/rcar/qos/qos.mk
include drivers/renesas/rcar/pfc/pfc.mk
include lib/libfdt/libfdt.mk
PLAT_INCLUDES += -Idrivers/renesas/rcar/ddr \
PLAT_INCLUDES += -Idrivers/renesas/common/ddr \
-Idrivers/renesas/rcar/qos \
-Idrivers/renesas/rcar/board \
-Idrivers/renesas/rcar/cpld/ \

113
plat/renesas/rzg/bl2_plat_setup.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2020, Renesas Electronics Corporation. All rights reserved.
* Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -78,12 +78,26 @@ static void bl2_init_generic_timer(void);
#if RCAR_LSI == RZ_G2M
#define TARGET_PRODUCT PRR_PRODUCT_M3
#define TARGET_NAME "RZ/G2M"
#elif RCAR_LSI == RZ_G2H
#define TARGET_PRODUCT PRR_PRODUCT_H3
#define TARGET_NAME "RZ/G2H"
#elif RCAR_LSI == RZ_G2N
#define TARGET_PRODUCT PRR_PRODUCT_M3N
#define TARGET_NAME "RZ/G2N"
#elif RCAR_LSI == RZ_G2E
#define TARGET_PRODUCT PRR_PRODUCT_E3
#define TARGET_NAME "RZ/G2E"
#elif RCAR_LSI == RCAR_AUTO
#define TARGET_NAME "RZ/G2M"
#endif /* RCAR_LSI == RZ_G2M */
#if (RCAR_LSI == RZ_G2E)
#define GPIO_INDT (GPIO_INDT6)
#define GPIO_BKUP_TRG_SHIFT ((uint32_t)1U << 13U)
#else
#define GPIO_INDT (GPIO_INDT1)
#define GPIO_BKUP_TRG_SHIFT (1U << 8U)
#endif /* RCAR_LSI == RZ_G2E */
CASSERT((PARAMS_BASE + sizeof(bl2_to_bl31_params_mem_t) + 0x100)
< (RCAR_SHARED_MEM_BASE + RCAR_SHARED_MEM_SIZE),
@ -424,6 +438,18 @@ static void bl2_populate_compatible_string(void *dt)
ret = fdt_setprop_string(dt, 0, "compatible",
"hoperun,hihope-rzg2m");
break;
case BOARD_HIHOPE_RZ_G2H:
ret = fdt_setprop_string(dt, 0, "compatible",
"hoperun,hihope-rzg2h");
break;
case BOARD_HIHOPE_RZ_G2N:
ret = fdt_setprop_string(dt, 0, "compatible",
"hoperun,hihope-rzg2n");
break;
case BOARD_EK874_RZ_G2E:
ret = fdt_setprop_string(dt, 0, "compatible",
"si-linux,cat874");
break;
default:
NOTICE("BL2: Cannot set compatible string, board unsupported\n");
panic();
@ -441,6 +467,18 @@ static void bl2_populate_compatible_string(void *dt)
ret = fdt_appendprop_string(dt, 0, "compatible",
"renesas,r8a774a1");
break;
case PRR_PRODUCT_H3:
ret = fdt_appendprop_string(dt, 0, "compatible",
"renesas,r8a774e1");
break;
case PRR_PRODUCT_M3N:
ret = fdt_appendprop_string(dt, 0, "compatible",
"renesas,r8a774b1");
break;
case PRR_PRODUCT_E3:
ret = fdt_appendprop_string(dt, 0, "compatible",
"renesas,r8a774c0");
break;
default:
NOTICE("BL2: Cannot set compatible string, SoC unsupported\n");
panic();
@ -560,6 +598,42 @@ static void bl2_advertise_dram_size(uint32_t product)
dram_config[1] = 0x80000000ULL;
dram_config[5] = 0x80000000ULL;
break;
case PRR_PRODUCT_H3:
#if (RCAR_DRAM_LPDDR4_MEMCONF == 0)
/* 4GB(1GBx4) */
dram_config[1] = 0x40000000ULL;
dram_config[3] = 0x40000000ULL;
dram_config[5] = 0x40000000ULL;
dram_config[7] = 0x40000000ULL;
#elif (RCAR_DRAM_LPDDR4_MEMCONF == 1) && (RCAR_DRAM_CHANNEL == 5) && \
(RCAR_DRAM_SPLIT == 2)
/* 4GB(2GBx2 2ch split) */
dram_config[1] = 0x80000000ULL;
dram_config[3] = 0x80000000ULL;
#elif (RCAR_DRAM_LPDDR4_MEMCONF == 1) && (RCAR_DRAM_CHANNEL == 15)
/* 8GB(2GBx4: default) */
dram_config[1] = 0x80000000ULL;
dram_config[3] = 0x80000000ULL;
dram_config[5] = 0x80000000ULL;
dram_config[7] = 0x80000000ULL;
#endif /* RCAR_DRAM_LPDDR4_MEMCONF == 0 */
break;
case PRR_PRODUCT_M3N:
/* 4GB(4GBx1) */
dram_config[1] = 0x100000000ULL;
break;
case PRR_PRODUCT_E3:
#if (RCAR_DRAM_DDR3L_MEMCONF == 0)
/* 1GB(512MBx2) */
dram_config[1] = 0x40000000ULL;
#elif (RCAR_DRAM_DDR3L_MEMCONF == 1)
/* 2GB(512MBx4) */
dram_config[1] = 0x80000000ULL;
#elif (RCAR_DRAM_DDR3L_MEMCONF == 2)
/* 4GB(1GBx4) */
dram_config[1] = 0x100000000ULL;
#endif /* RCAR_DRAM_DDR3L_MEMCONF == 0 */
break;
default:
NOTICE("BL2: Detected invalid DRAM entries\n");
break;
@ -578,13 +652,23 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2,
const char *unknown = "unknown";
const char *cpu_ca57 = "CA57";
const char *cpu_ca53 = "CA53";
const char *product_g2e = "G2E";
const char *product_g2h = "G2H";
const char *product_g2m = "G2M";
const char *product_g2n = "G2N";
const char *boot_hyper80 = "HyperFlash(80MHz)";
const char *boot_qspi40 = "QSPI Flash(40MHz)";
const char *boot_qspi80 = "QSPI Flash(80MHz)";
const char *boot_emmc25x1 = "eMMC(25MHz x1)";
const char *boot_emmc50x8 = "eMMC(50MHz x8)";
#if (RCAR_LSI == RZ_G2E)
uint32_t sscg;
const char *sscg_on = "PLL1 SSCG Clock select";
const char *sscg_off = "PLL1 nonSSCG Clock select";
const char *boot_hyper160 = "HyperFlash(150MHz)";
#else
const char *boot_hyper160 = "HyperFlash(160MHz)";
#endif /* RCAR_LSI == RZ_G2E */
#if RZG_LCS_STATE_DETECTION_ENABLE
uint32_t lcs;
const char *lcs_secure = "SE";
@ -646,6 +730,15 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2,
case PRR_PRODUCT_M3:
str = product_g2m;
break;
case PRR_PRODUCT_H3:
str = product_g2h;
break;
case PRR_PRODUCT_M3N:
str = product_g2n;
break;
case PRR_PRODUCT_E3:
str = product_g2e;
break;
default:
str = unknown;
break;
@ -667,10 +760,22 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2,
NOTICE("BL2: PRR is RZ/%s Ver.%d.%d\n", str, major, minor);
}
#if (RCAR_LSI == RZ_G2E)
if (product == PRR_PRODUCT_E3) {
reg = mmio_read_32(RCAR_MODEMR);
sscg = reg & RCAR_SSCG_MASK;
str = sscg == RCAR_SSCG_ENABLE ? sscg_on : sscg_off;
NOTICE("BL2: %s\n", str);
}
#endif /* RCAR_LSI == RZ_G2E */
rzg_get_board_type(&type, &rev);
switch (type) {
case BOARD_HIHOPE_RZ_G2M:
case BOARD_HIHOPE_RZ_G2H:
case BOARD_HIHOPE_RZ_G2N:
case BOARD_EK874_RZ_G2E:
break;
default:
type = BOARD_UNKNOWN;
@ -762,7 +867,7 @@ lcm_state:
if (boot_cpu == MODEMR_BOOT_CPU_CA57 ||
boot_cpu == MODEMR_BOOT_CPU_CA53) {
ret = rzg_dram_init();
ret = rcar_dram_init();
if (ret != 0) {
NOTICE("BL2: Failed to DRAM initialize (%d).\n", ret);
panic();
@ -884,6 +989,9 @@ void bl2_platform_setup(void)
static void bl2_init_generic_timer(void)
{
#if RCAR_LSI == RZ_G2E
uint32_t reg_cntfid = EXTAL_EBISU;
#else
uint32_t reg_cntfid;
uint32_t modemr;
uint32_t modemr_pll;
@ -899,6 +1007,7 @@ static void bl2_init_generic_timer(void)
/* Set frequency data in CNTFID0 */
reg_cntfid = pll_table[modemr_pll >> MODEMR_BOOT_PLL_SHIFT];
#endif /* RCAR_LSI == RZ_G2E */
/* Update memory mapped and register based frequency */
write_cntfrq_el0((u_register_t)reg_cntfid);

58
plat/renesas/rzg/platform.mk
View File

@ -1,5 +1,5 @@
#
# Copyright (c) 2018-2020, Renesas Electronics Corporation. All rights reserved.
# Copyright (c) 2018-2021, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -32,6 +32,55 @@ else
endif
$(eval $(call add_define,RCAR_LSI_CUT))
endif
else ifeq (${LSI},G2H)
RCAR_LSI:=${RZ_G2H}
ifndef LSI_CUT
# enable compatible function.
RCAR_LSI_CUT_COMPAT := 1
$(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
else
# disable compatible function.
ifeq (${LSI_CUT},30)
RCAR_LSI_CUT:=20
else
$(error "Error: ${LSI_CUT} is not supported.")
endif
$(eval $(call add_define,RCAR_LSI_CUT))
endif
else ifeq (${LSI},G2N)
RCAR_LSI:=${RZ_G2N}
ifndef LSI_CUT
# enable compatible function.
RCAR_LSI_CUT_COMPAT := 1
$(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
else
# disable compatible function.
ifeq (${LSI_CUT},10)
RCAR_LSI_CUT:=0
else ifeq (${LSI_CUT},11)
RCAR_LSI_CUT:=1
else
$(error "Error: ${LSI_CUT} is not supported.")
endif
$(eval $(call add_define,RCAR_LSI_CUT))
endif
else ifeq (${LSI},G2E)
RCAR_LSI:=${RZ_G2E}
ifndef LSI_CUT
# enable compatible function.
RCAR_LSI_CUT_COMPAT := 1
$(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
else
# disable compatible function.
ifeq (${LSI_CUT},10)
RCAR_LSI_CUT:=0
else ifeq (${LSI_CUT},11)
RCAR_LSI_CUT:=1
else
$(error "Error: ${LSI_CUT} is not supported.")
endif
$(eval $(call add_define,RCAR_LSI_CUT))
endif
else
$(error "Error: ${LSI} is not supported.")
endif
@ -168,12 +217,15 @@ RCAR_SYSTEM_RESET_KEEPON_DDR := 0
endif
$(eval $(call add_define,RCAR_SYSTEM_RESET_KEEPON_DDR))
include drivers/renesas/rzg/ddr/ddr.mk
RZG_SOC :=1
$(eval $(call add_define,RZG_SOC))
include drivers/renesas/common/ddr/ddr.mk
include drivers/renesas/rzg/qos/qos.mk
include drivers/renesas/rzg/pfc/pfc.mk
include lib/libfdt/libfdt.mk
PLAT_INCLUDES += -Idrivers/renesas/rzg/ddr \
PLAT_INCLUDES += -Idrivers/renesas/common/ddr \
-Idrivers/renesas/rzg/qos \
-Idrivers/renesas/rzg/board \
-Idrivers/renesas/common \